III.C.1 Cognitive radio SoC example and metrics (GIT: description of RF front-end components & their metrics, 3p)

UWB Transceiver SOC (1.5 page):

Figure 1 shows the baseline ultra wideband (UWB) RF front-end block diagram, spectrum allocation, and die photo. The front-end is designed to support a new emerging wireless standard for personal area network (WPAN), IEEE 802.15.4a – IR UWB. The new standard is uniquely designed to support both data communications and ranging. The radio supports time-of-flight measurement to provide ~30cm ranging accuracy, which is about 30 times better than that of traditional WLAN based ranging. It uses pulse position modulation and pulse phase modulation together using root-raised-cosine (RRC) pulses. The wide bandwidth, 500MHz, of the RRC pulse provides high accuracy time domain resolution, which is important for accurate time-of-flight measurement. The IEEE 802.15.4a spectrum allocation spans from 3GHz to 10GHz. The design shown in Figure 1 supports Group 2 bands, which cover from 3GHz to 5GHz. Unlike most other pulse based radio designs, the RRC pulse train is up- or down- converted using RF mixers and RF carrier frequencies in our design. The RF carrier frequencies are generated using wide tuning range phase-locked loop (PLL). It uses direct conversion, and DC offset cancellation circuit is added to mitigate the self-mixing issue in direct conversion.

The wideband up- and down- conversion RF front-end architecture for IR UWB is very similar with that of the proposed cognitive radio (CR) as shown in Figure 2. The UWB design in 130nm technology will be modified and redesigned in 65nm technology to support CR functionality and the proposed self-healing algorithm. The following changes will be applied to the design: (1) The front-end bandwidth will be expanded from 3-5GHz to 0.8-5GHz. (2) The fixed wideband LNA will be modified to provide tunable narrow band operation over the CR spectrum. (3) The PLL tuning bandwidth will be expanded and a SD non-integer divider will be added for fine carrier frequency control and spectrum scanning. (4) A programmable SD data-converter will be added in the receiver for tunable pass band. (5) Every building block will have control knobs to support the proposed self-healing algorithm. (6) The wideband low pass filter in the receiver chain will be converted into a programmable band pass filter.

Table 1 shows simulated design metrics of the 3-5GHz receiver in IBM 10SF 65nm technology. The receiver includes LNA, active balun, and direct conversion mixer. The variations in gain, input matching, linearity, and noise figure are estimated using corner simulations. The estimated baseline yield before healing does not reflect the loss in yield by environmental variations and process defects. Other design metrics such as bandwidth and tuning error in tunable CR front-error will introduce extra loss in yield. We will conduct a thorough transceiver level yield analysis during the course of the proposed research.

Metric / Unit / Value
Gain / dB / Nom 30.6
Max 31.6, Min 29.6
S11 / dB / Nom -17.1, Max -10
IIP3 / dBm / Nom -21.87, Min -22.5
NF / dB / Nom 3.62, Max 3.8
Performance Yield / % / 79.38

Yield Computation: <Chat, Madhavan, Byunghoo, Shreyas and Abhilash to write; write 1 para on how the yield was obtained using the corner simulations and scaling to 65nm include 1 figure>

RF Components:

Focus on LNA: <Chat, Madhavan, Shreyas and Abhilash to write>

External Stimulus <Chat, Shreyas>

Oscillation (Madhavan,Abhilash>

External Stimulus (0.5 page)

Chip Description: <Slide 2; Chat and Shreyas to write>

Performance Metrics and Yield: <Chat and Shreyas to write on the table provided including yield before and after self healing>

Oscillation (0.5 page)

Circuit Description <Madhavan and Abhilash to write>

Performance Metrics and Yield <Madhavan and Abhilash to write>

Transceiver (0.5 page):

Transceiver Description <Slide 3; Chat and Shreyas to write>

Performance metrics and Yield <Chat and Shreyas to write>