LHC-OP-MPS-0008
Page 2 of 2
– LHC- - - 1999-09-22
MPS Commissioning Procedure
The commissioning of the LHC machine protection system
MPS aspects of the Fast Magnet Current Change MonITORS commissioning
Abstract
This document describes the set of tests which will be carried-out to validate for operation the machine protection aspects of the LHC Fast Magnet Current Change Monitors (FMCM). The area concerned by these tests extends over the whole LHC machine for each of the two LHC beams.
These tests include Hardware Commissioning, machine check-out and tests with beam.
Prepared by :
Markus Zerlauth
Tonje Vik Jevard / Checked by :
Reyes ALEMANY FERNANDEZ
Gianluigi ARDUINI
Ralph ASSMANN
Roger BAILEY
Andy BUTTERWORTH
Etienne CARLIER
Bernd DEHNING
Pierre DAHLEN
Brennan GODDARD
Magali GRUWE
Eva Barbara HOLZER
Verena KAIN
Mike LAMONT
Alick MACPHERSON
Laurette PONCE
Bruno PUCCIO
Stefano REDAELLI
Mariusz SAPINSKI
Rudiger SCHMIDT
Jim STRAIT
Benjamin TODD
Jan UYTHOVEN
Walter VENTURINI DELSOLARO
Jorg WENNINGER
Christos ZAMANTZAS
Markus ZERLAUTH / Approved by :
Rüdiger Schmidt,
Jorg Wenninger
History of Changes
Rev. No. / Date / Pages / Description of Changes
0.1
0.2
0.3
0.4
0.5
0.6
/ 2007-04-25
2007-04-27
2007-06-13
2008-11-20
2008-12-11
2009-02-25 / 13
13
13
13
13
13 / First draft for circulation.
Second version for circulation amongst authors
Including comments of J.Uythoven
Update after first experience from HWC 2008
Version released for approval
Included comments from approval round
Updated names of responsible equipment teams after reorganisation
In Table 1: RMSI.R8B2 connected to BIC INJ2, RMSI.L2B1 connected to BIC INJ1
Section 8.4: adding 2nd test sequence to be repeated for RD1 in IR1 and IR5 every time β* is decreased
Adding Reference section
Table of Contents
1. Introduction 4
2. Scope 4
3. Purpose 4
4. The layout 4
4.1 Installation of systems in the transfer lines 5
4.2 Installation of systems in the LHC 6
4.3 CONNECTIONS TO THE BEAM INTERLOCK CONTROLLER (BIC) 6
5. Tests performed during the hardware commissioning 6
5.1 Individual system tests 6
6. Link to other equipement 8
6.1 IntErfaceS with the Beam Interlock system 8
6.2 interface with the POWER CONVERTER / MAGNET 9
7. System tests during the machine checkout 9
8. Tests with beam 9
8.1 Pilot of 1×1010 p+ at 450 Gev 10
8.2 43 bunches of 4×1010 p+ at 450 Gev 10
8.3 156 bunches of 9×1010 p+ at 450 Gev 10
8.4 pilot of 1×1010 p+ at 7 tev 10
8.5 43 bunches of 4×1010 p+ at 7 tev 10
8.6 156 bunches of 9×1010 p+ at 7 tev 10
8.7 936 bunches of 4×1010 p+ at 7 tev 10
8.8 936 bunches of 9×1010 p+ at 7 tev 10
8.9 Half nominal: 2808 bunches of 5×1010 p+ at 7 tev 11
8.10 Nominal: 2808 bunches of 11×1010 p+ at 7 tev 11
8.11 Stages depending on optics requiring test 11
8.12 Stages depending on crossing at IP requiring test 11
9. APPENDIX #1 12
1. Introduction
After the qualification for operation of the individual systems of a sector, validation and specific studies of each equipment as a whole will be carried-out in the context of the machine protection system (MPS) commissioning.
2. Scope
This document covers the tests which will be carried-out to condition and validate for operation all the components of the Fast Magnet Current Change Monitors in relation with the machine protection system for LHC beam1 and2. The area concerned by these tests is the whole LHC ring. The equipments concerned are the respective FMCMs and components of the beam interlock system (BIS) in the LHC underground areas and surface buildings (see chapter 4 for details).
3. Purpose
This document
1. gives a comprehensive list of the components which will be the object of the tests (Voltage dividers, timing cards, FMCMs, BIC).
2. describes in detail the procedures which will be applied for these tests and their sequence.
Each test has in front one of the following letters, defining at which interval or at which occasion the described test needs to be repeated (in the column labelled Repetition):
N / Not to be repeatedS / To be repeated after every Shutdown
P / Periodical repetition required, like 1 x per month; details to be defined in text
O / To be repeated when LHC optics is changed
X / To be repeated when crossing scheme is changed
This document is meant to be the reference document for the checklist which will be used during the commissioning of the MPS. Results of the tests will be documented in the MTF database.
4. The layout
A number of electrical circuits in the LHC transfer lines and the LHC are equipped with an FMCM, providing additional protection against powering failures. This includes normal conducting separation dipoles in IR1 and IR5 of the LHC, dump septa magnets in IR6, experimental compensators for ALICE and magnets in the collimation insertions IR3 and IR7. In the transfer lines TT40, TI2, TT60 and TI8, FMCM systems are installed on septa magnets, main bends and switching magnets as shown in detail in Figure 1 and Figure 7.
Figure 1: Layout of the FMCM and their locations in the LHC and the SPS-LHC Transfer lines
4.1 Installation of systems in the transfer lines
For the SPS-LHC-CNGS transfer lines 14 monitors are installed. The voltage divider, the FMCM and the corresponding CIBU interface are installed in the corresponding power converter as shown in detail in APPENDIX #1. The hardware for the controls and timing interface will be installed in the close-by ROCS-MUGEF crate.
The following electrical circuits in the transfer lines between SPS and LHC/CNGS will be equipped with a FMCM:
Circuit Name / PC Location / Control ROCS / Transfer Line / BIC (loc.)MSE4183M / BB4 / M1SBB4 / TT40 / TT40 (BA4)
RBIH.400107 / BA4 / M1SBA4 / TT40 / TT40 (BA4)
RBIH.400309 / BA4 / M1SBA4 / TT40 / TT40 (BA4)
RBI.410010 / BB4 / M1SBB4 / TI8/ CNGS / TT41 (BA4)
RBI.410147* / BA4 / M1SBA4 / CNGS / TT41 (BA4)
RBI.81607* / BA4 / M1SBA4 / TI8 / TI8up (BA4)
RBIH.87833 / SR8 / M1SSR8 / TI8 / BIC INJ2 (SR8)
RMSI.R8B2 / SR8 / M1SSR8 / TI8 / BIC INJ2 (SR8)
MST6177M / BA6 / M3SBA6 / TT60 / TT60 (BA6)
MSE6183M / BA6 / M3SBA6 / TT60 / TT60 (BA6)
RBIH.20150 / BA7 / M1SBA7 / TI2 / TI2up (BA7)
RBI.22134 / SR2 / M1SSR2 / TI2 / TI2dw (SR2)
RBIH.29314 / SR2 / M1SSR2 / TI2 / BIC INJ1 (SR2)
RMSI.L2B1 / SR2 / M1SSR2 / TI2 / BIC INJ1 (SR2)
Table 1: Monitors in the transfer lines (*: using the same power supply and unlike other circuits not equipped with a free-wheeling diode)
4.2 Installation of systems in the LHC
In the LHC, a total of 12 FMCMs are monitoring normal conducting separation magnets in IR1 and IR5, experimental correctors in IR2, septum magnets in the beam dump lines, and normal conducting dipole and quadrupole magnets in IR3 and IR7.
Installation of the voltage divider, the FMCM (1U) and the CIBU interface (2U) will take place in the rack of the corresponding beam interlock controller of the LHC as shown in detail in APPENDIX #1.
The following electrical circuits in the LHC will be equipped with a FMCM:
Circuit name / PC Location / Control LHC / Area / BIC (loc.)RD1.LR1 / SR1 / FGC / LHC / CIBC.L1 (US152)
RBXWTV.L2 / SR2 / FGC / LHC / CIBC.R2 (UA27)
RBXWTV.R2 / SR2 / FGC / LHC / CIBC.R2 (UA27)
RD34.LR3 / SR3 / FGC / LHC / CIBC.S3 (SR3)
RQ4.LR3 / SR3 / FGC / LHC / CIBC.S3 (SR3)
RQ5.LR3 / SR3 / FGC / LHC / CIBC.S3 (SR3)
RD1.LR5 / SR5 / FGC / LHC / CIBC.R5 (UJ56)
RMSD.LR6B1 / SR6 / FGC / LHC / CIBC.R6 (UA67)
RMSD.LR6B2 / SR6 / FGC / LHC / CIBC.R6 (UA67)
RD34.LR7 / SR7 / FGC / LHC / CIBC.S7 (SR7)
RQ4.LR7 / SR7 / FGC / LHC / CIBC.S7 (SR7)
RQ5.LR7 / SR7 / FGC / LHC / CIBC.S7 (SR7)
Table 2: Monitors for electrical circuits/magnets in the LHC
4.3 CONNECTIONS TO THE BEAM INTERLOCK CONTROLLER (BIC)
Each FMCM is connected to a mask-able BOTH BEAMS input of the nearest beam interlock controller in the LHC or the beam interlock controller managing the corresponding transfer line, following the specification for the CIBU connection (except for the two dump septa circuits RMSD in IR6 that individually interlock B1 and B2).
For commissioning purposes of this input, the FMCM is able to provoke in a special test mode individual inhibit/beam dump signals of the A and B channel upon request (requiring an intervention on the device). However, the FMCM is never able to disable any dump request towards the BIC, nor is this test mode to be activated during nominal operation of the device.
5. Tests performed during the hardware commissioning
Previous to installation, each FMCM will be tested for its full functionality in the lab. No specific hardware commissioning is foreseen for the system and setting up of the device can be done during powering to nominal tests of the corresponding electrical circuits or during a short, specific test window of not more than two hours.
5.1 Individual system tests
During the individual system tests, the reading of the voltage over the magnet string (either taken directly at the magnet terminals or the power converter output) is verified at the level of the FMCM. For the TL devices, a steep current step of around -4 % at nominal current is programmed into the cycle of the power converter at a given time. For the LHC devices the power converter will be tripped at the respective current level via a FGC_STATE fault (to trigger the creation of a PM buffer). The trigger time of the FMCM (where the USER_PERMIT switches to FALSE), extracted from the BIC history buffer is compared to the measured PC current (as shown in Figure 2). The corresponding current decay at the trigger time of the FMCM is extracted from the PM data set of the power converter and is used to validate the defined detection thresholds for the corresponding magnet (LHC-CIW-ES-0002, EDMS Doc.Nr.: 678140).
Figure 2: Example of current step of -4% programmed into the CNGS cycle of the SPS super-cycle for the power converter MSE4183M (left) and the corresponding trigger of the FMCM in the BIC history buffer (right)
In case the delay in between the current decay and detection time at the trigger time of the FMCM does not meet the specification values [1], the threshold setting of the FMCM will be decreased and the test repeated. In order to minimise false beam dumps (especially in the LHC where beam dumps will take a long time to recover), the trigger threshold will be set a factor of 2 above the minimum possible threshold (which showed to be a sensible factor during CNGS commissioning).
5.1.1 Conditions required to START and perform tests
– The power converter needs to be connected to the magnet(s) and fully operational and commissioned (including operating conditions of cooling, electricity, network, etc.)
– Warm Magnet interlock system commissioned and operational for magnet protection during tests
– The FMCM needs to be installed and connected to the voltage divider and the CIBU interface
– Nominal current will be put in the circuits during the tests, thus the same access conditions as for (Hardware Commissioning) powering tests have to be applied
5.1.2 Description of the tests
The following tests will be performed during hardware commissioning:
Rep. / Action / Group(s) Responsible1 / N / For each individual FMCM, verify correct installation of voltage divider and cabling towards the FMCM. Validate voltage measurement during a PC cycle at the monitoring outputs of the FMCM / TE/EPC, TE/MPE
2 / N / For each individual FMCM, verify correct installation of the controls interface and timing cabling and validate its functionality via the SCADA system; validate the correct storage of PM data. / TE/MPE
3 / S, O / For each FMCM, program a current step into the powering cycle and validate the correct triggering of the FMCM with the BIS; optimize threshold if required with increasing beam intensity/energy (Note: The threshold is not dependent on the beam intensity/energy, but may for safety reasons be further decreased for high beam intensity). / BE/OP, TE/MPE
5.1.3 Status of the system after tests
After these tests, the interlock logic and thresholds of the Fast Magnet Current Change Monitors interlocks have been checked and the system is ready to be tested with beam.
6. Link to other equipement
The interfaces listed in this paragraph concern only the ones in relation with the Machine Protection System; it does not describe any procedures to test the interfaces to protect individual equipment but only summarise the logic applied in the design.
6.1 IntErfaceS with the Beam Interlock system
The interface with the BIS is described in more detail in the corresponding test specification [2] and will be tested within the scope of the BIS tests.
6.1.1 SIGNALS between FMCM and Beam INTERLOCK SYSTEM
– Each FMCM is linked to the BIS via a CIBUS and is connected to a maskable input. As the FMCMs are mostly protecting single aperture magnets (or twin aperture magnets with a single power supply), the FMCM always dumps both beams in the LHC (except for the dump septas in point 6). FMCMs in the transfer lines the SPS extraction will be inhibited in case the FMCM remove the user permit.
– The “Beam_Info” signal given by the BIS is read back by each FMCM but not used in the interlock logic.
Figure 3: Connection scheme of FMCM with BIS.
6.2 interface with the POWER CONVERTER / MAGNET
Each FMCM is connected to the corresponding power supply/magnet chain via a high- or low-voltage divider (see Figure 4) in order to normalise the voltage reading of each circuit to the required range of +10 / -10V and to provide the galvanic isolation towards the power converter.