Parasitic extraction
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Inelectronic design automation,parasitic extractionis calculation of theparasitic effectsin both the designed devices and the required wiringinterconnectsof anelectronic circuit: detailed device parameters,parasitic capacitances,parasitic resistancesandparasitic inductances, commonly calledparasitic devices, parasitic components, or simply parasitics.
The major purpose of parasitic extraction is to create an accurate analog model of the circuit, so that detailed simulations can emulate actual digital and analog circuit responses. Digital circuit responses are often used to populate databases for signal delay and loading calculation such as:timing analysis;circuit simulation; andsignal integrityanalysis. Analog circuits are often run in detailed test benches to indicate if the extra extracted parasitics will still allow the designed circuit to function.
Contents[hide]
· 1Background
· 2Interconnect capacitance extraction
· 3Interconnect resistance extraction
· 4Interconnect inductance extraction
· 5Tools and vendors
o 5.1FastCap, FastHenry
o 5.2Star-RCXT
o 5.3QRC
· 6See also
· 7References
[edit]Background
In earlyintegrated circuitsthe impact of the wiring was negligible, and wires were not considered as electrical elements of the circuit. However below the 0.5-micrometretechnology noderesistance and capacitance of the interconnects started making a significant impact on circuit performance.[1]With shrinkingprocesstechnologies inductance effects of interconnects became important as well.
Major effects of interconnect parasitics includesignal delayandsignal noise.
[edit]Interconnect capacitance extraction
Interconnect capacitance is calculated by giving the extraction tool the following information: the top view layout of the design in the form of input polygons on a set of layers; a mapping to a set of devices and pins (from aLayout Versus Schematicrun), and a cross sectional understanding of these layers. This information is used to create a set of layout wires that have added capacitors where the input polygons and cross sectional structure indicate.
[edit]Interconnect resistance extraction
/ This section is empty.You can help byadding to it.[edit]Interconnect inductance extraction
/ This section is empty.You can help byadding to it.[edit]Tools and vendors
The tools fall into the following broad categories.
§ Field solversprovide physically accurate solutions. They calculate electromagnetic parameters by directly solvingMaxwell's equations. Due to high calculation burden they are applicable only very small designs or to parts of the designs.
§ Approximate solutions with pattern matching techniques are the only feasible approach to extract parasitics for complete modern integrated circuit designs.
[edit]FastCap, FastHenry
FastCap and FastHenry, fromMIT(Massachusetts Institute of Technology) are two free parasitics extractor tools for capacitance, and inductance and resistance. Quoted in many scientific articles, are considered golden references in their field. Windows versions with viewer and editor are freely available from FastFieldSolvers.[2][3]
[edit]Star-RCXT
Star-RCXT fromSynopsys(previously fromAvanti) is a universal parasitics extractor tool applicable for a full range of electronic designs.[4]
[edit]QRC
QRC fromCadenceis a parastics extractor tool for both digital and analog designs.[5]
[edit]See also
§ Standard Parasitic Exchange Format
§ Detailed Standard Parasitic Format
[edit]References
1. ^"Automatic Layout Modification", by Michael Reinhardt,p. 120
2. ^MIT Computational Prototyping Group
3. ^FastFieldSolvers
4. ^Star-RCXT
5. ^[1]