Introduction to Computer Science: Exam 1

2014-03-24

  1. (10 points)Convert each of the following base ten representations to its equivalent two’s complement representation in which each value is represented in 7 bits.

①-13

②16

  1. (15 points)Describe two drawbacks of “sign and magnitude”representation of signed integers. When we use N bits for “sign and magnitude”representation of signed integers, what are the largest and smallest numbers?
  1. (10 points)Suppose that we use 5 bits for excess notation of signed integers. Convert each of the following excess representations to its equivalent base ten representation.

①01111

②11111

  1. (15 points)Decode the following bit patterns using the floating-point format given below.

①01101101

②11011100

  1. (15 points)Encode the following values into the floating-point format given above. Indicate the occurrence of truncation errors.

①

②

  1. (20 points)Suppose the memory cells at addresses 00 through 0D in the machine described in Appendix C contain the following bit patterns.

Address / Contents
00 / 20
01 / 06
02 / 21
03 / 01
04 / 40
05 / 12
06 / 51
07 / 12
08 / B1
09 / 0C
0A / B0
0B / 06
0C / C0
0D / 00

Assume that the machine starts with its program counter equal to 00.

①What bit pattern will be in register 0 when the machine halts?

②What bit pattern will be in register 1 when the machine halts?

③What bit pattern is in the program counter when the machine halts?

  1. (15 points) Suppose we want to complement the 4 middle bits of a byte while leaving the other 4 bits undisturbed. What mask must we use together with what operations?

APPENDIX C: Virtual Machine Language

Op-code / Operand / Description
1
2
3
4
5
6
7
8
9
A
B
C / RXY
RXY
RXY
0RS
RST
RST
RST
RST
RST
R0X
RXY
000 / LOAD the register R with the bit pattern found in the memory cell whose address is XY
LOAD the register R with the bit pattern XY.
STORE the bit pattern found in register R in the memory cell whose address is XY.
MOVE the bit pattern found in register R to register S.
ADD the bit patterns in registers S and T as though they were two’s complement representations and leave the result in register R.
ADD the bit patterns in registers S and T as though there represented values in floating-point notation and leave the floating-point result in register R.
OR the bit patterns in registers S and T and place the result in register R.
AND the bit patterns in registers S and T and place the result in register R.
EXCULSIVE OR the bit patterns in registers S and T and place the result in register R.
ROTATE the bit pattern in register R one bit to the right X times. Each time place the bit that started at the low-order end at the high-order end.
JUMP to the instruction located in the memory cell at address XY if the bit pattern in register R is equal to the bit pattern in register 0. Otherwise, continue with the normal sequence of execution.
HALT execution.

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