ES210L, Digital Circuits and Logic Design Lab

Reporter Name: / Date:
Partner Names / Group No.:

Lab 4:Encoder and Decoder

1. Objectives
1. Learn how NAND gate can generate AND, OR, NOT, NOR gates
2. Examine Decimal to Binary Encoder.
3. Examine Binary to Decimal Decoder.
4. Develop the Verilog Design and Test bench programs to simulate and obtain various waveforms of a decoder.
1. Introduction
• NAND gate is most commonly used and can generate all other gates including AND, OR, NOT, NOR, XOR, and XNOR. It isinteresting to examine a simple encoder and a decoder using the gates.
• A decimal-to-binary encoder converts a decimal number that we key into a calculator or a computer to binary for the processor to manipulate. To simplify the circuits, you design the octal-to-binary encoder in this expeiment. However, the principle is basically the same.
• Adecodercoverts the output binary number of a calculator or computer to display as decimal for human readability. To simplify the circuits, you design thebinary-to-octal decoder in this expeiment. However, the principle is the same.
1. Parts needed

• A Digital Multimeter
• A +5 V power supply
/
• Two 74LS20 (dual 4-input NAND gate)
• Datasheets of the gates from the Internet.

1. Procedure

For your report, you can save a copy of this instruction sheet with file name “YourLastName_Encoder_Decoder_Lab4.docx” & fill in the answers to the questions for submission.

1. Generation of gates by 2-input NAND gate:Show how you can generate NOT, 2-input AND, and 2-input OR gates using only 2-input NAND gates. For each, show the logical operation and draw the circuit (Multisim is preferred).

Gate / Logical Formulation to make the diagram / Diagrams with NAND gates only
NOT / Example:
(A.A)’=A’, i.e., NAND with its inputs connected together /
AND
OR
NOR
1. Octal-to-Binary Encoder circuit has 2n (or fewer) inputs that accepts anOctal number and has n outputs to display the binary equivalent number in bits. Fig. 1 shows a simple encoder that converts octal digits from 0 to 7 to their binary equivalents.Each output shows the value at that bit position (2^2, 2^1, 2^0).Complete the truth table and drive the expression for x, y, and z that represent the binary value at the bit position. Next, construct the encoder by NAND gates. On the protoboard, use the switches to input the Octal digits, D1 to D7 and LEDs to indicate the binary bit levels x, y, z at the outputs. Assume that D0 is represented by x=y=z=0. Let the instructor sign your logbook for the proper operation of the circuit. Decimal-to-Binary encoder operates the same way with more gates.

Fig. 1. Octal to Binary Encoder. / Octaal / x=2^2 / y=2^1 / z=2^0 / Write simplified logical expression for x, y, and z in terms of D0 to D7
0
1
2
3
4
5
6
7
1. Set all switches to Logical 1. Observe and record the state of the LEDs.

1. Set switch 1 to Logical 0, observe and record the state of the LEDs.

1. Set switch 1 to Logical 1 and reset switch 2 to (0), observe and record the state of the LEDs.

1. Continue setting one switch to zero at a time and record the status of the LEDs. Demonstrate your circuit to the instructor.

1. Describe the operation of the encoder used by explaining the operation of each gate.

1. Binary to Octal Decoder:When a computer has completed an operation, the answer is usually given in binary form that has to be decoded to decimal form for most people. A decoder could do this function. It has n inputs and 2n outputs. Fig. 2 shows a simple decoder using 3-input AND gates.A Binary-to-Octal decoder is used here instead of Binary-to-Decimal decoder for simplification.

D7 bottom / Fig. 2. A Three-to-Eight Decoder using 3-input AND gates (see Fig 4.18 and Table 4.6).
Input binary bits / Output Octal Digits
1. Complete the truth table for the decoder to convert the 3-bit binary number to its octal equivalent from 0 to 7.
Note: YOU DO NOT NEED to construct the circuit for this decoder. However, you need to write the Verilog programs for it.If you do it, you can receive 10% bonus. / 2^2 / 2^1 / 2^0
x / y / z
1. Explain why octal digit 0 should be wired the way it is.

1. Explain why octal digit 5 should be wired the way it is.

1. Verilog simulation – Write the Verilog design and test bench programs for the 3-bit-to-octal decoder, compile it, make sure it is error-free, and simulate the circuit to get the output waveforms for the inputs x=y=z=0 initially, after 50 ms, x=z=0, y=1, after 50 ms, x=y=1, z=0, and after 50 ms, x=y=z=1. Show the Verilog programs and the waveforms display for a period of 200 ms in the following table. Verify the outputs versus the truth table above. Show the waveform of the inputs and outputs diagram to the instructor and include it in your report.

//Verilog Design Program / //Verilog Test Bench Program
Verilog waveform Diagram