Expanded Cookbook Instructions for the Teradyne Integra J750 Test System

Expanded “Cookbook” Instructions for the Teradyne Integra J750 Test System

Design Report

Team

May 07-12

Client

ECpE Department

Faculty Advisor

Dr. Weber

Team Members

Murwan Abdelbasir, EE.

Brent Hewitt-Borde, EE.

Jonathan Brown, EE.

Robert Stolpman, EE.

REPORT DISCLAIMER NOTICE

DISCLAIMER: This document was developed as a part of the requirements of an electrical and computer engineering course at Iowa State University, Ames, Iowa.

This document does not constitute a professional engineering design or a professional land surveying document. Although the information is intended to be accurate, the associated students, faculty, and Iowa State University make no claims, promises, or guarantees about the accuracy, completeness, quality, or adequacy of the information. The user of this document shall ensure that any such use does not violate any laws with regard to professional licensing and certification requirements. This use includes any work resulting from this student prepared document that is required to be under the responsible charge of a licensed engineer or surveyor. This document is copyrighted by the students who produced this document and the associated faculty advisors. No part may be reproduced without the written permission of the senior design course coordinator.

Date Submitted

11/10/2006

Table of Contents

List of Figures iii

List of Tables iv

Definitions v

1. Introductory Material 1

1.1 Executive Summary 1

1.2 Acknowledgement 1

1.3 Problem Statement and Solution 1

1.3.1 Problem Statement 1

1.3.2 Problem Solution 2

1.4 Operational Environment 2

1.5 Intended User and Intended Use 3

1.5.1 Intended User 3

1.5.2 Intended Use 3

1.6 Assumptions and Limitations 4

1.6.1 Assumptions 4

1.6.2 Limitations 5

1.7 Expected End-Product and Other Deliverables 5

2. Approach and Design 6

2.1 Introduction 6

2.2 Approach Used 7

2.1.1 Design Objectives 7

2.1.2 Functional Requirements 7

2.1.3 Design constraints 7

2.1.4 Technical Approach Considerations and Results 8

2.1.5 Testing approach considerations 10

2.1.6 Recommendations regarding project continuation and modifications 10

2.2. Detailed Design 10

2.2.1 Overview of the project design 10

2.2.2 IG-XL and Teradyne J750 functionality 11

2.2.3 Device Selection 14

2.2.4 Deliverable Documentation 17

3. Resources and Schedule 17

3.1 Personal Effort Requirements 17

3.2 Other Resource Requirements 19

3.3 Financial Requirements 19

3.4 Project Schedule 21

4. Closure Material 22

4.1 Project Team Information 22

4.1.1 Client Information 22

4.1.2 Faculty Advisor Information 22

4.1.3 Team Members’ Information 23

4.2 Closing Summary 23

4.3 References 23

List of Figures

Figure 1: Teradyne J750 tester v

Figure 2: ESD wrist band 3

Figure 3: Concepts showing the three test types 6

Figure 4: ZIF DIP Socket 8

Figure 5: TSSOP to DIP socket converter 9

Figure 6: Functional Diagram of the AD7470 16

Figure 7: Gantt chart for Accomplishments 21

Figure 8: Gantt chart for Deliverables 21

Figure 9: Revised Gantt chart for Accomplishments 22

Figure 10: Revised Gantt chart for Deliverables 22

List of Tables

Table 1: Estimated Personal Efforts 18

Table 2: Revised estimated Personal Efforts 18

Table 3: Estimated additional resources 19

Table 4: Revised estimated additional resources 19

Table 5: Estimated Project Costs 20

Table 6: Revised Estimated Project Costs 20

Table 7: Team Members contact information 23

Definitions

ADC - Analog to digital converter

ASIO - Analog signal I/O board

CSG - Computer Support Group

DAC - Digital to analog converter

DIB - Device interface board

DSIO - Digital signal I/O board

DSP - Digital signal processing

DUT - Device under test

ECpE - Electrical and computer engineering

ESD - Electrostatic discharge

GND – Ground

MSPS – Mega-samples per second

I/O - Input and output

IG-XL - A windows based software that utilizes Microsoft Excel and Visual Basic to develop programs for the Teradyne J750

IMD - Inter-modulation distortion

ISU - Iowa State University

Kbps – Kilo-bits per second or 1000 bits per second.

Mbps – Mega-bits per second or 1000000 bits per second.

MSO - Mixed-signal option testing that uses analog and digital simultaneously

PSI - Pounds per square inch, a unit of measurement for pressure exerted on a known surface area

PLCC – Plastic leadless chip carrier

SNR - Signal to noise ratio

TDR - Time domain reflectometry

TSSOP – Thin shrink small outline package

Teradyne J750 - A tester donated to ISU that is used for testing printed circuit boards and integrated circuits as shown in the figure below.

ZIF – Zero insertion force

Figure 1: Teradyne J750 tester

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1. Introductory Material

This section introduces the project, abstract, acknowledgements, problem statement and solution, operating environment, intended users and uses, limitations and assumptions, expected end product and other deliverables.

1.1 Executive Summary

The scope of this project is to expand upon previous Teradyne J750 cookbooks of instructions which are in a manual format for the ISU Department of Electrical and Computer Engineering. At present the current cookbook instruction set is missing a mixed-signal option section and the present project team members fills this gap by reviewing, citing previous cookbooks to meet the mixed-signal testing requirements requested by the ECpE department to create an extended cookbook. The team will setup and test two (10) ten to (12) twelve bit ADC’s, two (10) ten to (12) twelve bit DAC’s, and a (10) ten MHz or faster op-amp using the Teradyne J750 and document each scenario for support. The test scenarios and documentation will be used to create this mixed-signal cookbook.

1.2 Acknowledgement

The team members extend great appreciation and would like to this opportunity to thank Dr. Robert Weber for the advisory role and being very committed to the team and this project through out its duration. The team also likes to acknowledge and thank Jason Boyd for the training and on site supervision for the first scheduled month after the initial meeting with Dr. Weber of the project as well as the Department of Electrical and Computer Engineering at Iowa State for use of the Teradyne J750 and the Teradyne Company for the J750 tester. Lastly the team would like to acknowledge the previous senior design teams for the documentation that is left in the lab to be used as a source of reference on this project.

1.3 Problem Statement and Solution

This section gives a general outline and an overview of the proposed problem solution.

1.3.1 Problem Statement

The success of any product for the market after the planning and fabrication phases relies heavily on some form of testing and experimentation. The product must undergo some form of rigorous tests for different scenarios before release to ensure that it is functioning according to specifications and the client expectations. Universities and colleges which are research oriented provide a cost effective way of testing such products for companies and investors.

Iowa State is no exception and with the donation of the Teradyne Integra J750 tester from the Teradyne Corporation, it gives Iowa State department of Electrical and computer engineering this opportunity to achieve this cost effective way of testing and building devices.

This is important because the research conducted can create new methods of testing and also increase or build upon the productivity of the equipment donated and the devices under test. The associated cost of obtaining a fully functional tester is beyond the university’s operating budget and the present Teradyne J750 does not have the capability at present to perform mixed-signal testing.

The two past groups have already designed, tested and implemented digital circuits as well as a wireless circuit for testing along with the original function of the J750 to test analog circuits. The present team must test these required components of 10 to 12 bits ADC’s, 10 to 12 bits DAC and a 10 MHz or greater op-amp via the Teradyne with the specific hardware and software configuration to have the capability to test mixed-signal IC circuits. The results are to be included as another phase onto the existing Teradyne “cookbooks” that past senior design groups have produced.

1.3.2 Problem Solution

The team will devise a way to interface the required mixed-signal components with the Teradyne J750 and software code written using IG-XL software that will be compatible with three different breeds of devices; a DAC, ADC, and a high speed operational amplifier. Once this is setup, methods for testing the devices will be developed and recorded in an orderly fashion.

These records and testing procedures along with the results will then be brought together in one concise package. This package will be added on to the current Teradyne J750 cookbook and will show users how to setup and test mixed-signal devices using the machine with would have document support.

1.4 Operational Environment

Operation of the circuits has to occur indoors within a temperature range of 27°C to 33°C because of the sensitivity to temperature the Teradyne J750 own circuitry possesses and the fact that the equipment itself is worth over 500,000 US dollars, maintains why a preventative process needs to be followed before operating the machine. Thus, the Department of Electrical and Computer Engineering will only operate and test the various circuits for mixed-signal in a temperature regulated room.

The presence of a human body presents the opportunity for the distribution of charge and voltage to any form of circuitry .i.e. (ESD – electrostatic discharge) and which can have an adverse affect on the equipment similar to temperature. It is required that every person that is present in the room who is in direct contact with the Teradyne J750 to wear ESD wrist bands when using the tester. This ESD wrist band is shown below in Figure 2.

Figure 2: ESD wrist band

The vacuum pump and the “on” portion of the on/off switch are to be activated before any form of testing can be done after the first two instructions above are done. The purpose of the vacuum pump is to allow the DIB and the tester surface to be held together safety with approximately (4) four PSI of pressure so that the both interfaces are locked together so the other devices that need to be mounted can be done and held in a stable position for the process of testing.

1.5 Intended User and Intended Use

Section defines who are the intended users and the intended uses of the project.

1.5.1 Intended User

The potential audience for this project will be any student or faculty member of the Department of Electrical and Computer Engineering that requires testing of the mixed-signal option devices. It can also be used as a laboratory experiment to re-enforce the concepts learnt in various ECpE classes that applies to MSO theory and industry applications.

The user must possess some form of knowledge of IC circuits; digital logic, signals and digital communication, and an understanding of the operation the Teradyne J750 for conducting tests. The user must be able to synchronize the frequency that controls clock cycle along with the rest of setup and be able to follow the reference manual developed by the design team.

1.5.2 Intended Use

The intended use of the project is to allow mixed-signal testing using the Teradyne J750 tester and to develop and test various scenarios for two different ten (10) to twelve (12) bit ADC’s as well as DAC’s and for a ten (10) MHz or greater op-amp. This mixed-signal option provides an innovative approach to these microcontroller mixed-signal devices similar to the present industry testing capabilities and using the IG-LX software provided is able to efficiently record the results from the tests so as to achieve the goals of the Department of Electrical and Computer Engineering.

1.6 Assumptions and Limitations

This section outlines the expected assumptions and limitations for the end-product where any additional assumptions and limitations to be included prior to team or advisor consultations about specifics of the project.

1.6.1 Assumptions

This section provides the relevant details of the user and system assumptions.

1.6.1.1 User Assumptions

This section outlines the assumptions about the intended user:

·  Willing and can follow basic instructions during training to use the equipment so as to follow all necessary safety precautions.

·  User has read and understood the Teradyne J750 instructional manual.

·  A suitable background in electrical and/or computer engineering.

·  Previous experience in circuit testing with the Teradyne J750.

·  User is knowledgeable of the electrical hazards the equipment can distribute and what the user is at risk of transferring to the machine.

·  User treats and operates all equipment in a timely and professional manner.

·  User is familiar with technical English as all documentation at present is/will be written in English.

·  User is knowledge about mixed-signal operation and concepts.

·  User is able to tolerate the noise caused by the vacuum pumps.

1.6.1.2 System Assumptions

This section outlines the assumptions about the overall system:

·  All instruments are operational and calibrated.

·  No expired licenses or copyright material that the team does not have permission to use.

·  Present IG-XL codes can be modified for the required objectives.

·  The vacuum pumps are always operational.

·  Testing of DUT’s are limited to one at a time.

·  Teradyne J750 can interface with the IC devices to be tested.

1.6.2 Limitations

This section will provide details of the limitations identified with the project:

·  The Teradyne J750 is sensitive to temperature fluctuations and must operate within of the calibrated temperature. The current system is set for.

·  The IG-XL software shall be used in writing the test code for the Teradyne J750.

·  User has to undergo some form of industry standard training as provided by Teradyne the various training modules that are used as reference materials.

·  Modules on MSO are lengthy and can be regarded as a combination of DSP, high speed testing, communication and signals, VLSI courses taught presently at ISU all packed into one.