1(Research Scholar,SRM University NCR Campus Ghaziabad, India,)

THREE DIMENSIONAL SIMULATION STUDY OF FULLY DEPLETED SILICON ON INSULATOR MOSFET (SOI MOSFET) BY SEPARATION OF VARIABLE METHOD

Neha Goel1, Manoj Kumar Pandey2,

Bhawna agarwal3

1(Research Scholar,SRM University NCR Campus Ghaziabad, India,)

2(Department of ECE , SRM University NCR Campus Ghaziabad,India, )

3(Assistant prof. Birla Instt of Tech. Mesra. Ext(jaipur)

)

ABSTRACT

A three dimensional fully depleted Silicon-On-Insulator (SOI MOSFET) device is developed, based on the numerical solution of three dimensional Poisson’s equation, is presented in this paper. Separation of variable method is used to solve the three dimensional Poisson’s equation analytically with necessary boundary conditions. In this Paper, Variation of Front Surface potential wrt channel Length, channel Width are presented. In Addition to that threshold voltage , Electric Field and Mobility Profiles wrt channel length and channel Width are also presented,

Keywords:

Silicon on insulator (SOI), Poisson’s Equation with boundary conditions, Front surface potential, Threshold voltage. Mobility, Gate Width, Gate Length, Gate Oxide Thickness.

INTRODUCTION

Gain in integrability and speed are the main reason for the continuous improvements through scaling in metal oxide semiconductor field effect transistors (MOSFETs), However Bulk CMOS will remain as the main technology for submicron gate ULSI systems. Thin film fully depleted silicon on insulators (SOI) MOSFETs have superior electrical performances due to better control of short channel effects, excellent Latchup immunity, improved isolation & reduced parasitic capacitances compared to bulk silicon technology[1].

In this paper, an analytical three dimensional model for small geometry SOI MOSFET is presented by solving 3D poissons equation. The model is used to predict the subthreshold behavior of small geometry MOSFET as the degradation of threshold voltage and the increase of sub-threshold swing, are the dominant small geometry effects limiting the scaling of channel dimensions and to give insights into device design and their scaling limits. In this paper, 3D poissons equation is solved by separation of variables method.

SILICON ON INSULATOR (SOI) MOSFET

There are various characteristics of SOI MOSFET due to which it would be beneficial to switch to SOI MOSFET technology. The main advantages of SOI technology are the following.

• Due to insulation layer, there is no parasitic bipolar devices, As a result, latch up can be totally eliminated.
• SOI MOSFETs are having higher radiation tolerance.
• Due to the insulation layer above the substrate, these devices have smaller leakage current.
• These devices have high speed of operation due to the lower capacitance between device and substrate.
• Power dissipation of SOI MOSFET is small, because operated at lower voltages and current levels [2].

There is a need to develop numerical device models for SOI-based MOSFETs as these are suitable for circuit simulation. The analytical modeling of the threshold voltage of FD SOI MOSFETs has already been reported by numerous authors [3]-[5].

Small device structures are difficult to described by one-dimensional or even two-dimensional (2D) models, that’s why 3D numerical device models are developed for study of the accurate electrical characterization of small geometry devices [7] – [8].

Fig; 1 Cross sectional view of SOI MOSFET along channel Length

Now, In order to analyze the structure shown in Fig. 1, we need to solve both Poisson’s equation and current continuity equation. In this paper, we consider a fully depleted (FD) SOI film. The 3-D Poisson’s equation in the FD SOI film region is given by,

------(1)

where NA is the doping concentration and ψ(x,y,z) is the potential at a particular point (x,y,z) in the SOI film.

The 3-D Poisson’s Equation is numerically solved by using Separation of Variable method. The boundary conditions used for the solution of Poisson’s equation are applicable only for bulk MOSFETs. David Esseni [9] described a mobility model also for SOI MOSFET using solution of 1D Poisson’s equation.

POISSON’S EQUATION WITH BOUNDARY CONDITIONS

Fig. 1 illustrates a three-dimensional view of a typical MOSFET structure with corresponding device dimensions. The source–SOI film and drain–SOI film junctions are located at y=0 and y=Leff, respectively,where, Leff is the effective channel length. The front and back Si–SiO interfaces are located at x=0 and x=ts, where ts is the SOI film thickness. toxf and toxb are the front and the back gate oxide thicknesses, respectively, where the applied potential to the front and back gates are Vgf and Vgb.The vertical and the lateral directions are defined as x and y, respectively, while the direction along the width of the transistor is defined as z. The sidewall Si–SiO interfaces are located at z=0 and z=W.

In general, in order to analyze this structure, we need to solve the Poisson’s equation. In this paper, we consider a fully depleted (FD) SOI film. The Separation of variables technique is used to solve the 3D poisson’s equation analytically with appropriate boundary conditions. The 3-D Poisson’s equation in the FD SOI film region is given by:

------(1)

In order to solve equation (1), it is separated into 1D Poisson’s equation, 2-&3-D Laplace equation as :

------(2)

------(3)

------(4)

Where, Ψi=Ψl(x)+Ψs(x,y)+Ψv(x,y,z) ------(A)

A: Solution of Ψl(x)

------(5)

B: Solution of Ψs(x,y)

------(6)

------(7)

------(8)

------(9)

-----(10)

------(11)

C: Solution of Ψv(x,y,z)

------(12)

------(13)

------(14)

------(15)

------(16)

Main Equation of Surface Potential (Ψi) can be calculated by putting values of Ψl,Ψs and Ψv in Equation A.

RESULTS

Variation of Surface Potential, Threshold Voltage, Electric Field and Mobility with respect to Channel Length and width can be seen as below.

SURFACE POTENTIAL

The basic 3D Poisson’s equation (1) is solved using Separation of Variable Method to determine the surface potential for fixed value of gate voltage and assumed value of the drain voltage.

The variation of front surface potential at the front Si-SiO2 interface (i.e., x=0) of a uniformly doped SOI MOSFET for different values of channel length is shown in fig.2a.

In this figure, we determine the Variation of front surface potential for n-channel SOI MOSFETs along the different values of channel length at the front Si-SiO2 interface and z=w/2. The values we have taken here are: toxf=3nm ,ts=70nm, toxb=400nm, NA=1×1017/cm3 at Vgf=Vgb=0 & Vds=1.5V

Fig.2a. Variation of the front Surface Potential along different values of the channel length at the front Si-SiO2 interface

From this graph we found that the front surface potential decreases linearly near the source end and increases linearly near drain end. This is due the fact that the high electric field near the drain causes the conductivity rapidly. Due to this it is expected that the electric field near the drain end reaches the critical field for high drain voltage and hence causes the velocity saturation.

Similarly, the variation of front surface potential at the front Si-SiO2 interface of a uniformly doped SOI MOSFET for different values of channel width is shown in fig.2b.

In this figure, we determine the Variation of front surface potential for n-channel SOI MOSFETs along the different values of channel width at the front Si-SiO2 interface and z=w/2. The values we have taken here are: for toxf=3nm,ts=70nm,toxb=400nm,NA=1×1017/cm3 at Vgf=Vgb=0 & Vds=50mV

Fig.2b. Variation of the front Surface Potential along different values of the channel width at the front Si-SiO2 interface

THRESHOLD VOLTAGE OF A SMALL GEOMETRY FDSOI MOSFET

The threshold voltage of the short channel MOSFET[5,11] is defined as the gate voltage at which the minimum surface potential in the channel is the same as the channel potential at threshold for a long channel device, i.e., at threshold.

The variation of threshold voltage with respect to Channel length and Channel Width is shown in Fig 3(a),3(b) resp,

Fig 3(a). shows the variation of threshold voltage for n-channel SOI MOSFETs with different values of channel length having these values: Leff=1µm,toxf=10nm,toxb=400nm,toxw=15nm, for Vds=50mV and Vgb=0V.

Fig 3(b). shows the variation of threshold voltage for n-channel SOI MOSFETs with different values of channel width having these values: W=1.2µm,toxf=10nm,toxb=400nm,toxw=15nm, for Vds= 50 mV and Vgb=0V .

VTF of a small geometry SOI MOSFET is defined as:

VTF=Vgf when Ψ(0,y,W/2) =2φb ------(B)

Now, putting (B) in main Equation of surface potential, and using (5), (6)–(15), we have

------(17)

Where,

Fig.3(a) Variation of threshold voltage for n-channel SOI MOSFETs with respect to channel length.

Here Fig 3(a) shows that Threshold Voltage Increases linearly near the source end and Decreases linearly near drain end.

Fig.3(b). Variation of threshold voltage for n-channel SOI MOSFETs with respect to channel length.

ELECTRIC FIELD:

The electric field distribution along the channel length and width is also obtained and it is shown in figures 4(a),4(b). The electric field along the length of the channel (Ey) is dominant over the electric field along channel width (Ez)

The electric field increases rapidly near the drain end. This is due to the fact that the carrier density near the drain end experiences a rapid decrease in surface concentration which calls for a rapid increase in the electric field to maintain the constant drain current.

.

Fig.4(a).Variation of Electric Field along the length of channel

Fig.4(b).Variation of Electric Field along the width of channel

MOBILITY:

The value of mobility (velocity per unit electric field) is influenced by several factors. The mechanisms of conduction through the valence and conduction bands are different, and so the mobility associated with electrons and holes are different. As the density of dopants increases, more scattering occurs during conduction. Mobility therefore decreases as doping increases. At low temperatures, electrons and holes gain more energy than the lattice with increasing T, therefore mobility increases. At high temperatures, lattice scattering dominates, and thus mobility falls.

We can find out the mobility of charge carriers from the electric field values. The mobility along channel length & channel width is given by,

------(18)

&

------(19)

Where, Ey=Electric field along channel length

Ez=Electric field along channel width

εsi=silicon permittivity

εox=oxide permitivity

The mobility variation along the channel length & channel width is shown in Fig 5(a) & 5(b) resp.

Mobility is directly proportional to the electric field. So the shape of the mobility curve along the channel length and width is same as that of the electric field curve along channel length and width resp.

Fig. 5(a) Variation of mobility with respect to length of channel

Fig. 5(b) Variation of mobility with respect to width of channel

Conclusion:

A threshold voltage model for fully depleted (FD) SOI MOSFET based on numerical solution of 3-D Poisson’s equation is presented by using Separation of variables method. The Study of Surface potential distribution, Threshold Voltage, electric Field and Mobility is done with respect to channel length and width in this paper.

References:

[1] C. Fiegna, H. Iwai, T: Wada, T. Saito, E. Sangiorgi, and B. Ricco, “A new scaling methodology for the 0.1-0.025pm MOSFET,” in I993 Symp. VLSI Technol. Dig. Tech. Papers, 1993, pp. 33--34.

[2] Guruprasad Katti , Nandita DasGupta , Amitava DasGupta , “Threshold Voltage Model for Mesa – Isolated Small Geometry Fully Depleted SOI MOSFETs Based onAnalytical Solution of three Dimensional Poisson’s Equation”, IEEE Transactions On Electron Devices, Vol. 51, No. 7, July 2004.

[3] Jason C. S. Woo, Kyle W. Terrill, Prahalad K. Vasudev, “ Two – Dimensional Analytic Modeling of Very Thin SO1 MOSFET’s ”, IEEE Transactions on Electron Devices , Vol. 37. No.9. September 1990.

[4] Hans van Meer, Kristin De Meyer , “A 2-D Analytical Threshold Voltage Model for Fully-Depleted SOI MOSFETs with Halos or Pockets ”, IEEE Transactions on Electron Devices, Vol. 48, No. 10, October 2001.

[5] H.K Lim, J.G.Fossum,” Threshold voltage of thin film SOI MOSFETs”, IEEE Transactions on electron devices, Vol. 30, Oct 1983.

[6] Francis Balestra, Mohcine Benachir, Jean Brini , Gerard Ghibaudo , Analytical Models of Sub threshold Swing and Threshold Voltage for Thin- and Ultra-Thin - Film SO1 MOSFET’s , IEEE Transactions On Electron Devices. Vol 37. No II. November 1990.

[7] C.Mallikarjun, K. N . Bhat , “ Numerical and Charge Sheet Models for Thin – Film SO1 MOSFET’s ”,IEEE Transactions On Electron Devices , Vol. 37. No. 9. September 1990.

[8] Takeshi Shima , Hisashi Yamada , Ryo Luong MoDang,”Table Look-Up Simulator MOSFET Modeling System Using a 2-D Device and MonotonicPiecewise cubic Interpolation ” ,IEEE transactions on Computer Aided design of Integrated Circuits and Systems, Vol.CAD.2, No.2, April 1983.

[9] David Esseni, Antonio Abramo, Luca Selmi, Enrico Sangiorgi , “ Physically Based Modeling of Low Field Electron Mobility in Ultrathin Single - and Double – Gate SOI N - MOSFETs ” , IEEE Transactions On Electron Devices ,Vol. 50, No.12, December 2003.

[10] 10.S. Veeraraghavan and J. G. Fossum , “ Short - channel effects in SO1 MOSFET’S ” IEEE Trans. Electron Devices , vol. 36 , pp. 522-528, 1989.

[11] Z. H. Liu , C. H. Hu , J. H. Huang , T. Y. Chan , M. C. Jeng , P. K. KO, and Y. C. Cheng, “Threshold voltage model for deep- sub micrometer MOSFET ’s,” IEEE Trans. Electron Devices, vol. 40, pp. 86-95, 1993.

[12] Y. A. El – Mansy and A. R. Boothroyd, “A simple two - dimensional model for IGFET operation in the saturation region,” IEEE Trans. Electron Devices, vol. 24, p. 254, 1977.

[13] T. Y. Chan , P. K. KO , and C. Hu , “ Dependence of channel electric field on device scaling,’’ IEEE Electron Devices Lett., vol. 6, p. 551, 1985.

[14] K. W. Temll , C. Hu, and P. K. KO , “ An analytical model for the channel electric field in MOSFET with graded - drain structure,” IEEE Electron Device Lett., vol. 5, p. 440, 1984.