/ PACT 2002
The Eleventh International Conference on Parallel Architectures and Compilation Techniques
Charlottesville, Virginia, September 22-25, 2002

Organizing Committee
General Chairs
Jack W. Davidson, University of Virginia
Kevin Skadron, University of Virginia
Program Chairs
Erik Altman, IBM TJ Watson Research
Sally A. McKee, Cornell University
Finance Chair
Evelyn Duesterwald, HP Labs
Local Arrangements Chairs
Bruce Childers, University of Pittsburgh
Kevin Scott, University of Virginia
Publications Chair
Martin Schulz, Technical University Munich, Germany
Publicity Chairs
Frank Mueller, North Carolina State University
Lixin Zhang, University of Utah
Tutorial and Workshop Chairs
Chen Ding, University of Rochester
E. Christopher Lewis, University of Pennsylvania
Web Chair
Lixin Zhang, University of Utah
Work in Progress Chair
Nikos Pitsianis, BOPS Inc.
Student Advocate
Steve Carr, Michigan Technological University
Sally A. McKee, Cornell University
Program Committee
David Abramson (Monash Univ., Australia)
Eduard Ayguade (Technical Univ. of Catalonia, Spain)
Luc Bouge (IRISA, ENS Cachan/Bretagne, France)
George Cai (Intel)
Tien-Fu Chen (National Chung Cheng U., ROC)
Trishul Chilimbi (Microsoft)
Michel Cosnard (INRIA, France)
Jim Dehnert (Transmeta)
Bronis de Supinski (Lawrence Livermore National Lab)
Evelyn Duesterwald (HP Labs)
Sandhya Dwarkadas (Univ. of Rochester)
Kemal Ebcioglu (IBM Research)
Roberto Giorgi (Univ. of Siena, Italy)
R. Govindarajan (Indian Institute of Science, India)
Wilson Hsieh (Univ. of Utah)
Ali Hurson (Penn State Univ.)
Wen-Mei Hwu (Univ. of Illinois)
Wolfgang Karl (Technical Univ. Munich, Germany)
Dave Luick (IBM Rochester)
Tara Madhyastha (Univ. of California, Santa Cruz)
Margaret Martonosi (Princeton Univ.)
Bilha Mendelson (IBM Israel, Israel)
Soo-Mook Moon (Seoul National Univ., Korea)
Vijay Pai (Rice Univ.)
Steve Reinhardt (Univ. of Michigan)
John Shen (Intel)
Jim Smith (Univ. of Wisconsin)
Mary Lou Soffa (Univ. of Pittsburgh)
Kevin Theobald (Univ. of Delaware)
Marc Tremblay (Sun Microsystems)
Mateo Valero (Technical Univ. of Catalonia, Spain)
Andrew Wendelborn (Univ. of Adelaide)
Steering Committee
Michel Cosnard, Chair (INRIA, France)
Nader Bagherzadeh (Univ. of California, Irvine)
Kemal Ebcioglu (IBM)
Skevos Evripidou (Univ. of Cyprus)
Ulrich Finger (Institut Eurecom, France)
Guang Gao (Univ. of Delaware)
Jean-Luc Gaudiot (Univ. of California, Irvine)
Ali Hurson (Penn. State Univ.)
Todd Mowry (Carnegie Mellon Univ.)
John Shen (Intel)
Gabriel M. Silberman (IBM)
Mary Lou Soffa (Univ. of Pittsburgh)
Mateo Valero (Technical Univ. of Catalonia, Spain) /
PACT brings together researchers from architecture, compilers, languages and applications to present ground-breaking research and debate key issues of common interest. This year we have had a record number of submissions and expect yet another exciting program. We also have a diverse range of workshops and tutorials that will precede the main conference, and we are planning a variety of keynote presentations and a work-in-progress session. Please join us this year in historic Charlottesville, Virginia, home of the University of Virginia, which was founded by Thomas Jefferson as one of the first public universities in the United States. Charlottesville is nestled next to the beautiful Shenandoah mountains, with the homes of three presidents (Jefferson, Madison, and Monroe), Civil War sites, and many fine wineries nearby.
Student participation is especially encouraged. Some support for student travel is expected, with a special grant from IFIP to support students from developing countries. Please contact the student advocate, Steve Carr () for more information. Preference will be given to those students making presentations.
Workshops:
COLP’02:Workshop on Compilers and Operating Systems for Low Power
MEDEA’02:Workshop on Chip Multiprocessor: Processor Architecture and Memory Hierarchy Related Issues
SPDSEC’02: Workshop on Hardware/Software Support for Parallel and Distributed Scientific and Engineering Computing
WBT’02:Workshop on Binary Translation
Tutorials:
OpenMP,by Rudi Eigenmann (Purdue University).
Open Research Compiler (ORC): Beyond Version 1.0,by Roy Ju (MRL, Intel); Sun Chan (MRL, Intel); and Chengyong Wu (ICT, CAS).
Keynotes:
Dr. Dileep Bhandarkar, Intel,“Parallelism in Mainstream Enterprise Platforms of the Future.”
Dr. Steve Hammond, National Renewable Energy Laboratory,“The Role of Computational Science in Energy Efficiency and Renewable Energy.”
Dr. Rich Wolski, University of California, Santa Barbara, “The Computational Grid: Aggregating Performance and Enhanced Capability from Federated Resources.”
ADVANCE PROGRAM

SESSION: Data Parallelism and Threading

Data-Parallel Compiler Optimizations

Daniel Chavarria-Miranda and John Mellor-Crummey

Increasing and Detecting Memory Address Congruence

Samuel Larsen, Emmett Witchell, Saman Amarasinghe

Transparent Threads: Resource Allocation in SMT Processors for High Single-Thread Performance

Gautham Thambidorai and Donald Yeung

SESSION: Compiler Support for Architecture

Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures

Jaewook Shin, Jacqueline Chame, and Mary W. Hall

Effective Compilation Support for Variable Instruction Set Architecture

Jack Liu, Tim Kong, and Fred Chow

A Framework for Parallelizing Load/Stores on Embedded Processors

Santosh Pande, Xiaotong Zhuang, and John S. Greenland, Jr.

SESSION: Program Characterization

Workload Design: Selecting Representative Program-Input Pairs

Lieven Eeckhout, Hans Vandierendonck, and Koen De Bosschere

Dataflow Frequency Analysis based on Whole Program Paths

Bernhard Scholz and Eduard Mehofer

Quantifying Instruction Criticality

Eric S. Tune, Dean M. Tullsen, and Brad Calder

SESSION: Power

Application Transformations for Energy and Performance-Aware Device Management

Taliver Heath, Eduardo Pinheiro, Jerry Hom, Ulrich Kremer, and Ricardo Bianchini

Leakage Energy Management in Cache Hierarchies

Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut Kandemir, Mary Jane Irwin, and Anand

Sivasubramaniam

Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power

Steve Dropsho, Alper Buyuktosunoglu, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Greg

Semeraro, Grigorios Magklis, and Michael L. Scott

SESSION: Prediction

The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA Multiprocessors

Manuel E. Acacio, Jose Gonzalez, Jose M. Garcia and Jose Duato

Predicting Conditional Branches With Fusion-Based Hybrid Predictors

Gabriel Loh and Dana S. Henry

SESSION: Memory Performance

Speculative Sequential Consistency with Little Custom Storage

Chris Gniady and Babak Falsafi

Cost-Effective Compiler Directed Memory Prefetching and Bypassing

Daniel Ortega, Eduard Ayguade, Jean-Loup Baer, and Mateo Valero

Using the Compiler to Improve Cache Replacement Decisions

Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosenberg, and Charles C. Weems

SESSION: Memory Aliasing

Software Bubbles: Using Predication to Compensate for Aliasing in Software Pipelines

Benjamin Goldberg, Emily Chapman, Chad Huneycutt, and Krishna Palem

Speculative Alias Analysis for Executable Code

Manel Fernandez and Roger Espasa

Cost Effective Memory Dependence Prediction Using Speculation Levels and Color Sets

Soner Onder

SPECIAL SESSION: Works in Progress

SESSION: Java and IA-64

Just-In-Time Java Compilation for the Itanium Processor

Tatiana Shpeisman, Guei-Yuan Lueh, and Ali-Reza Adl-Tabatabai

Eliminating Exception Constraints in Java on IA-64

Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komatsu, andToshio Nakatani

SESSION: Clusters

Optimizing Loop Performance for Clustered VLIW Architectures

Steve Carr, Yi Qian, and Philip Sweany

Exploiting Pseudo-schedules to Guide Data Dependence Graph Partitioning

Alex Aleta, Josep Maria Codina, and Francisco Jesus Sanchez, Antonio Gonzalez, and David Kaeli

Efficient Interconnects for Clustered Microarchitectures

Joan-Manuel Parcerisa, Julio Sahuquillo, Antonio Gonzalez, and Jose Duato