KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
FMTH0301/Rev.5.2
Course Plan
Semester: 4 - Semester / Year:2016-17Course Title: Linear Integrated Circuits / Course Code: 15EECC205
Total Contact Credits: 50 / Duration of SEE: 3 Hours
SEE Marks: 50 / CIA Marks: 50
Lesson Plan Author: Nalini C Iyer
SujataS.Kotabagi
R V Hangal
Sujata N
JyotiPatil
Shraddha H / Date: 08-12-2016
Checked By: Dr.Nalini C Iyer / Date: 15-12-2016
Course Outcomes (COs):
At the end of the course the student should be able to:
i. Describe the operation of current mirror, differential Amplifier using MOSFET and analyze the respective performance parameters.
ii. Design and analyze the operations of linear applications using Op-amp for the given specifications.
iii. Design and analyze the operations of non-linear applications using Op-amp for the given specification.
iv. Realize the functional block for a given application and specifications using op-amp and linear ICs and verify its functionality using simulator tool.
Course Articulation Matrix: Mapping of Course Outcomes (COs) with Program Outcomes (POs)
Course Title: Linear Integrated Circuits / Semester: 4 - SemesterCourse Code: 15EECC205 / Year:2016-17
Course Outcomes (COs) / Program Outcomes (POs) / PO1 / PO2 / PO3 / PO4 / PO5 / PO6 / PO7 / PO8 / PO9 / PO10 / PO11 / PO12 / PO13 / PO14 / PO15
Describe the operation of current mirror, differential Amplifier using MOSFET and analyze the respective performance parameters. / M
Design and analyze the operations of linear applications using Op-amp for the given specifications. / M / M
Design and analyze the operations of non-linear applications using Op-amp for the given specification. / M / L
Realize the functional block for a given application and specifications using op-amp and linear ICs and verify its functionality using simulator tool / M / M / M / M
Degree of compliance L: Low M: Medium H: High
Competency addressed in the Course and corresponding Performance Indicators
Competency / Performance IndicatorsPO1.3 - Demonstrate competence in engineering fundamentals / PO1.3.1 - Apply fundamentals of Electrical engineering principles and laws
PO1.4 - Demonstrate competence in electronics and communication engineering knowledge / PO1.4.1 - Apply principles of electronic device
PO1.4.2 - Ability to understand electronic circuits
PO2.1 - Demonstrate an ability to identify and characterize an engineering problem / PO2.1.2 - Identify engineering systems, variables, and parameters to solve the problems
PO2.1.4 - Identify the mathematical, engineering and other relevant knowledge that applies to a given problem
PO5.2 - Demonstrate an ability to select and apply discipline specific tools, techniques and resources / PO5.2.2 - Demonstrate proficiency in using EDA tools
PO9.2 - Demonstrate effective individual and team operations-- communication, problem solving, conflict resolution and leadership skills / PO9.2.1 - Demonstrate effective communication, problem solving, conflict resolution and leadership skills
PO10.1 - Demonstrate an ability to comprehend technical literature and document project work. / PO10.1.2 - Produce clear, well-constructed, and well-supported written engineering documents
PO10.3 - Demonstrate the ability to integrate different modes of communication. / PO10.3.2 - Use a variety of media effectively to convey a message in a document or a presentation
Eg: 1.2.3: Represents Program Outcome ‘1’, Competency ‘2’ and Performance Indicators ‘3’.
Course Content
Course Code: 15EECC205 / Course Title: Linear Integrated CircuitsL-T-P-SS: 4-0-0-0 / Credits: 4 / Contact Hrs: 50
CIE Marks: 50 / SEE Marks: 50 / Total Marks: 100
Teaching Hrs: 50 / Exam Duration: 3 hrs
Content / Hrs
Unit - 1
Chapter No 1. OPAMP characteristics
Ideal and non-ideal OPAMP terminal characteristics, Input and output impedance, output Offset voltage, Small signal and Large signal bandwidth. / 4 hrs
Chapter No 2. Basic OPAMP architecture
Basic differential amplifier, Common mode and difference mode gain, CMRR, 5-pack differential amplifier with design, 7-pack operational amplifier, Slew rate limitation, Instability and Compensation, Bandwidth and frequency response curve. / 8 hrs
Chapter No 3. Current Mirrors
Current Mirror circuits and Modeling, Figures of merit (output impedance, voltage swing), Widlar, Cascode and Wilson current Mirrors, Current source and current sink. / 8 hrs
Unit - 2
Chapter No 4. OPAMP with Feedback
OPAMP under Positive and Negative feedback, Impact Negative feedback on Bandwidth, Input and Output impedances, Offset voltage under negative feedback, Follower property & Inversion Property under linear mode operation / 8 hrs
Chapter No 5. Linear applications of OPAMP
DC and AC Amplifier, Summing, Scaling and Averaging amplifiers (Inverting, Non-inverting and Differential configuration), Integrator, Differentiator,Voltage sources, current sources and current sinks, Active Filters –First and second order Low pass & High pass filters. V to I and I to V converters. / 10 hrs
Unit - 3
Chapter No 6 . Nonlinear applications of OPAMP
Crossing detectors (ZCD. Comparator), Inverting Schmitt trigger circuits, Monostable&Astable multivibrator, Triangular/rectangular wave generators, Waveform generator, Voltage controlled Oscillator, Precision rectifier, Limiting circuits. Current amplifier, Instrumentation amplifier, Clamping circuits, Peak detectors, sample and hold circuits, Log and antilog amplifiers, Multiplier and divider, Phase shift oscillator, Wein bridge oscillator,
Data Converters:
Digital to Analog Converters: Weighted resistor; R -2R, Current steering DAC, settling time of DAC.
Analog to Digital Converters: Flash, Dual slope, SAR; resolution, quantization error of ADC. / 12 hrs
Text Book (List of books as mentioned in the approved syllabus)
1. BehzadRazavi, Fundamentals of microelectronics , 2nd edition.
2. Phillip E. Allen, Douglas R. Holberg, CMOS Analog Circuit Design,
3. Ramakant A. Gayakwad, Op - Amps and Linear Integrated Circuits,
References
1. A.S. Sedra& K.C. Smith, Microelectronic Circuits,
2. Sergio Franco, Design with Operational Amplifiers and Analog Integrated Circuits.
3. David A. Bell, Operational Amplifiers and Linear Ics.
4. B. Razavi, Design of Analog CMOS Integrated CircuitsMcGraw-Hill, 2001
Evaluation Scheme
CIE Scheme
Assessment / Weightage in MarksMinor exam 1 / 20
Minor exam 2 / 20
Assignment/Project / 10
Total / 50
Date: Head of Department
Course Unitization for Minor Exams and Semester End Examination
Topics / Chapters / Teaching hours / No. of Questions in Minor exam 1 / No. of Questions in Minor exam 2 / No. of Questions in AssignmentUnit I
OPAMP characteristics / 4 / 0.5 / 0 / 0.5
Basic OPAMP architecture / 8 / 1.5 / 0 / 1.5
Current Mirrors / 8 / 1 / 0 / 1
Unit II
OPAMP with Feedback / 8 / 0 / 1 / 1
Linear applications of OPAMP / 10 / 0 / 2 / 2
Unit III
Nonlinear applications of OPAMP / 12 / 0 / 0 / 2
Note
1. Each Question carries 20 marks and may consists of sub-questions.
2. Mixing of sub-questions from different chapters within a unit (only for Unit I and Unit II) is allowed in Minor I, II and SEE.
3. Answer 5 full questions of 20 marks each (two full questions from Unit I, II and one full questions from Unit III) out of 8 questions in SEE.
Date: / Head of DepartmentCourse Code and Title: 15EECC205 / Linear Integrated Circuits
Chapter Number and Title: 1. OPAMP characteristics / Planned Hours: 4 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's / CO's / BL / CA CodeList the characteristics and compare the performance of an ideal and non ideal Op-Amp. / 1 / 2 / 1.4
Describe the differential and common mode signals. / 1 / 2 / 1.4
Discuss the importance of output offset voltage, input and output impedances, small signal and large signal bandwidth of ap-amp. / 1 / 2 / 1.4
Analyse the open loop configurations of Op-Amp for inverting,
Non-inverting and differential amplifier. / 1 / 2 / 1.4
Lesson Schedule
Class No. - Portion covered per hour
1. Ideal and non-ideal OPAMP terminal characteristics
2. Input and output impedance
3. Output Offset voltage.
4. Small signal and Large signal bandwidth.
Review Questions
Sr.No. - Questions / TLO / BL / PI CodeList the ideal characteristics of an OPAMP. Give its symbolical representation and explain the functions of each terminal. Tabulate the ideal Op-amp terminal characteristics. /
1
/1
/ 1.4.1Explain the terms input impedance, output impedance, output offset voltage, common mode and difference mode gain. /
2
/2
/ 1.4.1List the difference between ideal and non ideal characteristics of OPAMP. /
3
/2
/ 1.4.1Explain the small signal and large signal bandwidth. /
3
/2
/ 1.4.1Design the open loop configurations of Op-Amp for differential amplifier with
1) vin1 = 2v and vin3= -3v.
2) vin1 = 3µv and vin3= -4.5µv. /
4
/2
/ 1.4.1Course Code and Title: 15EECC205 / Linear Integrated Circuits
Chapter Number and Title: 2. Basic OPAMP architecture / Planned Hours: 8 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's / CO's / BL / CA CodeDescribe the working of a basic differential amplifier and Design the differential amplifier for the given specifications. / 1 / 2 / 2.1
Define common mode gain, difference mode gain and CMRR. / 1 / 2 / 1.4
Represent the input signals of a differential amplifier in terms of their differential and common mode gain. / 1 / 2 / 1.4
Describe the architecture of 5-pack and 7-pack differential amplifier.Derive the expression for small signal voltage gain. / 1 / 3 / 1.4
Analyze the limitations of the slew rate & understand what is instability and compensation / 1 / 2 / 1.4
Lesson Schedule
Class No. - Portion covered per hour
1. Basic differential amplifier
2. Common mode and difference mode gain
3. CMRR
4. 5-pack differential amplifier design.
5. 7-pack operational amplifier
6. Slew rate limitation, Instability Compensation
7. Bandwidth and frequency response curve
8. Revision and Numericals
Review Questions
Sr.No. - Questions / TLO / BL / PI Code1. Describe the working principle of a basic differential amplifier , with common mode and differential input voltages. / TLO1 / L2 / 1.4.1
2. Explain small signal operation of the MOS differential pair with differential and common mode gain. Explain CMRR and ICMR. / TLO2 / L2 / 1.4.1
3. For the 5 pack differential amplifier using usingnMOS drive and pMOS loads obtain the expression for small signal differential voltage gain. / TLO4 / L2 / 1.4.1
4. Design the currents and W/L values of the current mirror load differential amplifier to satisfy the following specifications: Vdd= -Vss=2.5V,SR>= 10V/us(Cload=5pf),f-3db>= 100kHz(CL=5pF),a small signal voltage gain of 100 V/V,-1.5<=ICMR<=2V and Pdiss<=1mW. Use model parameters of KN’= 110uA/V2, KP’= 50uA/V2, VTP=-0.7V, VTN=0.7V,λN=0.04V-1 , λP= 0.05V-1. / TLO1 / L2 / 2.1.2
5. Draw the architecture of a two stage operational amplifier and list the different sub circuits in it. Also draw the circuit diagram. / TLO4 / L2 / 1.4.1
6. Why compensation is required? Explain the compensation techniques in an op amp / TLO5 / L2 / 1.4.1
7. For a MOS differential pair with a common mode voltage VCM applied ,let VDD = VSS= 1.5V,kn’(W/L)=4mA/V2,Vt =0.5V ,I=0.4mA and RD =2.5KΩ neglect the channel length modulation. Find VOV and VGS for each MOSFET’s For VCM=-0.2 find vs,iD1,iD2,vD1 and vD2 What is the highest value of vcm for which M1 and M2 remain in saturation. / TLO1 / L2 / 2.1.2
Chapter-wise Plan
Course Code and Title: 15EECC205/ Linear Integrated CircuitsChapter Number and Title: 3. Current Mirrors / Planned Hours: 8 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's / CO's / BL / CA CodeModel and analyze the functionality of the current mirror. / 1 / 2 / 1.4
Analyze the performance characteristics of the current mirror in terms of figure of merit. / 1 / 2 / 1.4
Discuss the working principle of a standard cascade, Widlar& Wilson current mirror. / 1 / 2 / 1.4
Differentiate between current source and current sink. / 1 / 2 / 1.3
Determine a suitable circuit configuration for current sink,current source, Wilson &Widlar current mirror and find the expression for output impedance. / 1 / 3 / 2.1
Lesson Schedule
Class No. - Portion covered per hour
1. Introduction
2. Current Mirror circuits
3. Modeling
4. Figures of merit (output impedance, voltage swing)
5. Widlar, Cascode current Mirrors
6. Wilson current Mirrors
7. Current source and current sink.
8. Revision and Numericals.
Review Questions
Sr.No. - Questions / TLO / BL / PI Code1. Differentiate between current source and current sink? Illustrate with the help of a single MOS transistor. / TLO4 / L2 / 1.4.1
2. Describe the working principle of a standard cascade current sink. Compare its performance with basic current sink. / TLO3 / L2 / 1.4.1
3. Derive the equation of output impedance of a standard cascode current sink.(small signal model approach) / TLO3 / L2 / 1.3.1
4. Explain the working of Wilson and Widlar current mirror with neat diagram / TLO3 / L2 / 1.4.1
5. Derive the expression for output impedance of Wilson and Widlar current mirror. / TLO5 / L2 / 1.4.1
6. In basic current mirror circuit using two transistor having equal lengths, widths related by W2/W1 = 5, design a current mirror to obtain I= 0.5 mA. , let VDD= -VSS= 5 V, kn’ (W/L) 1 = 0.8 mA / V2, Vt= 1 V, find the value of R. / TLO1 / L2 / 1.4.1
7. Design an NMOS current mirror with VDD= 5 V, VSS= 0 V and Iref = 100 µA. For the matched MOSFETS L= 10 µm, W = 100 µm, Vt = 1 v and Kn’ = 20 µA/ V2. / TLO2 / L2 / 1.4.1
8. Determine a suitable circuit configuration to mirror the current from a reference current of 200ua with high input impedance to drive a differential amplifier with common mode input voltage for the following parameters: R = 2K Ω, Kn2= 10 Kn1= 250 µA/ V2 VDD= 5V.http://www.slideshare.net/mujju433/current-mirrors-very-good-pdf / TLO5 / L2 / 2.1.3
9. Calculate the small signal output resistance for the simple current sink of fig a. a)if Iout =100uA and b) the small signal output resistance if the simple current sink of fig a. is inserted into the cascade current sink configuration of fig a. Assume that W1/L1=W2/L2=1. Use below table for this problem.
/ TLO5 / L3 / 2.1.3
UNIT II