Graduation Mandate

Graduation Mandate

Graduation Mandate

TU Delft

Custom VLIW Instructions in ρ-VEX*

* ρ-VEX: A Reconfigurable and Extensible VLIW (Very Large Instruction Word) architecture Processor

Student: Alessandro Lo-Presti, 0795648
Supervisor:
dr. ir. Stephan Wong / Initials client agreement:
Graduation Coordinator INF/TI:
Aad van Raamt Ing. / Initials graduation coordinator agreement:
Examinator (1st teacher):
Wessel Oele Ing. / Initials examiner agreement:
Assessor (2nd teacher):
ir. Adrie van der Padt / Initials assessor agreement:

Index

1 Graduation Assignment 3

1.1 Client 3

1.2 Cause for assignment 3

1.3 Goals of graduation assignment 4

1.4 Overview subject field regarding the graduation assignment 4

1.4.1 Technologies/techniques used 4

1.5 Scope 5

1.6 Boundary conditions & restrictions 5

1.7 How is the graduation supervision within the / company / institution regulated? 5

1.8 Relationships with other projects / related work 5

2 Quality Expectations 6

3 Business Case 6

4 People Involved 7

1  Graduation Assignment

1.1  Client

The assignment was given by dr. ir. Stephan Wong, assistant professor at the TU Delft.
“Delft University of Technology (Dutch: Technische Universiteit Delft), also known as TU Delft, is the largest and oldest Dutch public technical university, located in Delft, Netherlands. With eight faculties and numerous research institutes it hosts over 15,000 students (undergraduate and postgraduate), more than 2,600 scientists (including more than 200 professors), over 2,000 doctoral students, and more than 2,000 people in the support and management staff.”
Sources:
·  http://en.wikipedia.org/wiki/TU_Delft
·  http://www.tudelft.nl/live/pagina.jsp?id=72110c60-2f3a-473d-b332-365d0f0e113e
Editorial note: I know citing from Wikipedia is generally regarded as a bad thing, but in my defense, the TU Delft is well known in The Netherlands and paraphrasing would have not added much to this description.

1.2  Cause for assignment

A custom microprocessor has been created by a Master student of the TU Delft (Thijs van As). It is a reconfigurable and extensible VLIW (Very Large Instruction Word) architecture processor which was named “ρ-VEX”. This microprocessor has a list of built-in operations similar to those found on any type of CPU (such as add/sub/mul/div/mov/branch operations/shifts/etc.) and also has built in functionality in place to account for custom defined CPU instruction. However, the way custom instructions are currently implemented requires manually intensive modifications at various parts of the code (in both VHDL and C). The architecture for custom VLIW instructions in ρ-VEX needs to change to be made more dynamically.
A large benefit of a dynamic implementation of custom instructions in ρ-VEX is that a programmer (who could be relatively inexperienced with VHDL) can gain an increase in application performance by delegating complex frequently used operations directly to a single custom instruction embedded in the CPU.

1.3  Goals of graduation assignment

The assignment at hand, leading up to a dynamic implementation of custom instructions in ρ-VEX, is to take an existing piece of C-code from an application (such as JPEG/MPEG2/H.264/AC3/EC-DS) which will act as a benchmark, find and extract frequently used complex operations and place these in hardware as single custom instruction(s). The C code then needs to be modified to make use of the newly added custom instruction(s) thereby, if done correctly, increasing performance of the overall application.
During this time, the foundation leading to dynamic VLIW instructions will need to be laid.

1.4  Overview subject field regarding the graduation assignment

Analysis / advice / design / realization / management
user interaction
company processes
software / 3 / 3 / 2 / 3 / 1
infrastructure / 1
hardware interfacing / 2 / 1 / 2 / 2 / 1
Source: Bachelor of ICT domeinbeschrijving HBO-i (in Dutch)

1.4.1  Technologies/techniques used

ρ-VEX was built in VHDL (VHSIC Hardware Description Language – VHSIC stands for very-high-speed integrated circuits), a language which describes digital and mixed-signal systems such as FPGAs (Field-Programmable Gate Arrays) and ICs (Integrated Circuits). Further more, ρ-VEX was designed to accommodate the Xilinx Spartan-3E (XC3S500) FPGA and one based on the Xilinx Virtex-II Pro (XC2VP30) FPGA.
Other than the hardware, other aspects that will be dealt with are C-code (possibly also ASM-code) and a TU Delft in-house developed toolchain.
Testing and debugging will be done using the Xiptech simulator (XTSim) and (at a later stage) using the UART connection on the FPGA. Modelsim may also be used to test changes in VHDL.

1.5  Scope

The scope of this graduation assignment, as defined by the TU Delft, is limited to the p-VEX microcontroller and related development environment. See also 2: Quality Expectations.

1.6  Boundary conditions & restrictions

Frequently used complex operations need to be found in an existing application such that when implemented as a single custom instruction in VHDL, an increase in performance can be measured.
An unguided workplace will be provided at the TU Delft but it is also possible to do the work from home. Thus, the graduation student is required to have a high level of independence to be able to work on the assignment, this also because there is no close day-to-day supervision (such as, for instance, found within a company).

1.7  How is the graduation supervision within the / company / institution regulated?

Main supervision will be carried out at least once a month by Stephan Wong, and closer supervision will be taken on by Fakhar Anjamm (a PhD student). Fakhar is available by email or at his office whenever there are any questions or need for guidance/advice/help.

1.8  Relationships with other projects / related work

As previously mentioned, ρ-VEX has been created by a Master student (Thijs van As) and has since been maintained by the TU Delft.
Work is continuously being done on the microcontroller in other projects such as implementation of a cache (which will lead to hyperthreading), internal busses and an IRQ system.
The ρ-VEX microcontroller can also be used as a softcore in the TU Delft MOLEN processor (http://ce.et.tudelft.nl/MOLEN/).

2  Quality Expectations

Eventually ground work will be laid to implement custom instructions as dynamically as possible.
However, the main scope of the graduation assignment is as follows:
·  Select an application domain (video, audio, graphics, encryption, etc.)
·  Select a specific application to use as benchmark.
o  Measure and document its performance.
o  Find frequently used complex operations.
·  Implement frequently used complex operations as custom instruction(s) in ρ-VEX.
o  Test the custom instruction(s) to ensure the functionality.
·  Modify the benchmark application to make use of the custom instruction(s).
·  Run the application on ρ-VEX.
o  Measure and document its performance.
·  Compare performance before and after implementation of custom instruction(s) to see any improvements.
Any improvements made to get closer to a more dynamic architecture for custom instructions will be a bonus.

3  Business Case

With custom VLIW instruction architecture in place, increase in performance of any application can be gained by delegating frequently used complex operations to single custom instructions embedded directly in the CPU.
{TODO: describe future plans. To what end am I seeking performance increase in benchmarking applications?}
Beschrijf hier hoe de afstudeeropdracht bijdraagt aan de bedrijfsstrategie, plannen en programma’s. Beschrijf tevens waarom gekozen is voor de gekozen doelstelling en resultaten van het project. Hoe ondersteunt het project de business strategie en/of programma en achterliggende reden gekozen oplossing

4  People Involved

Company: TU Delft

Postal Address: Computer Engineering

Postbus 5031, 2600 GA Delft

Physical Address: Computer Engineering (15th floor)
Mekelweg 4, 2628 CD Delft

Supervisor: dr. ir. Stephan Wong

Supervisor position: Assistant Professor

Phone: 015-2781099

E-mail:

Assistant supervisor: Fakhar Anjam

Assistant supervisor position: PhD student

Phone: 015-2785237

E-mail:

Graduation coordinator INF/TI: Aad van Raamt

Phone: 010-7944993

E-mail:

Examinator (1st teacher): Wessel Oele

Phone:

E-mail:

Assessor (2nd teacher): Adrie van der Padt

Telefoon: 010-7944839

E-mail:

Student: Alessandro Lo-Presti

Phone: 06-21914450

E-mail: