Lab #12: Digital Alarm SystemSAIT- ENT-DIGI-210

Lab #12:Digital Alarm System

SHORT VERSION

Updated October 18, 2018

Lab Description:

Design and construct a digital alarm system using logic elements such as latches, counters, decoders and displays.

Outline Objectives:

Module 9: Analyze the operating characteristics of latches and flip-flops.

Module 10: Configure asynchronous counters.

Module 12: Use Complex Programmable Logic Devices (CPLD) circuits, electronic simulation software and an experimenter’s board to verify the operation of digital circuits.

Pre-Lab Preparation:

Find a lab partner.

Load the CPLD software onto your system.

Review learning materials on counters, decoders and latches.

Equipment Required:

Parts kit and Vulcan Board
Electronics Simulation Software

CPLD design software

CPLD hardware programming hardware (supplied in the lab)

Evaluation:

Complete the design, showing all work.

Build and analyze a circuit: Physically or Virtually

Answer the questions.

Create a report.

Additional Notes:

  1. This is a group lab with 2 weeks allowed for completion.
  2. This is a challenging lab that requires knowledge of latches, counters, decoders and switches.
  3. This lab will require work outside of classroom time.
  4. In this short version of the lab, although a functional physical circuit is desirable, a functional simulation is acceptable.

Procedure:

Design an alarm system

Description of the problem:

A security system detects open doors or windows and sounds an alarm. The sensorsinclude 2 basic switchesto monitor a front and back door,1 magnetic reed switchfor window #1 and 1 push button switchfor window #2. These switches are wired into “zones”, with the windows (reed and push button switches) sharing Zone “A”, the front door switch in Zone “b” and the back doorswitch in zone “C”. See the block diagram on the next page.

The alarm is considered “armed” when it’s monitoring its zones, and is considered “tripped” if any of the switches within its zone are activated.

Additional features include a counter that indicates the number of times the alarm has tripped, and an alarm sound and a display that indicate the tripped zone (or zones) until the alarm circuit is re-armed.

Technical Requirements:

A brief report is required

  • 60% of the mark:
  • Indicate the zone letter of a tripped switch using a 7-segment display. This display will indicate a dashed line only (center segment) when the system is armed. Hint: Design a decoder.
  • 10% of the mark:
  • The displayed tripped zone should remain persistent until it is reset and the system is armed. Hint: Latching
  • 20% of the mark:
  • Display the number of times the alarm has been tripped, up to 5. The display must not recycle; if the alarm count is greater than 5 the display should continue to indicate 5. Include a separate reset for the alarm count. Hint: Use an external counter circuit with a decoder and a 7-segment display. Think edges.
  • 10% of the mark:
  • An alarm that continues to sound even if the tripped switch becomes reset (i.e. if someone opens an alarmed door and closes the door, the alarm should continue to sound). Control anoscillator output to an LED to simulate an alarm sound.

Diagram of the alarm system:

Additional details:

1-Design the circuit using EWB.

2-Reed switches are closed when the alarmed window is closed due to their proximity to a magnet fixed onto the window, therefore design for an open circuit as a tripped condition. In Zone A if either switch is opened the alarm should be tripped.

3-If constructing the circuit:

  • use the CPLD graphic editor tool for the decoders (switch letter and alarm count). The 7-segment display inputs are active-low and the device requires a minimum 220Ω resistor per segment.
  • If constructing the circuit, obtain missing switches from the lab instructor. Use your red switch pack for two of the alarm switches and for the reset switches.
  • Use monolithic Flip-Flops for the counters (not the CPLD).

Notes:

Remember to allow room on your breadboard for the CPLD, and program the CPLD with only Vcc and Ground connected.

Use resistors between the CPLD and any LED display (330 Ohm recommended).

Do not use counters in the CPLD as they will not function properly.

Use speakers in the lab for a source of magnets.

EWB does not have a “common” for the display. Use steering gates to control the display (this extra circuitry would not normally be necessary)

You may create subcircuits in EWB to make design easier, but the contents need to be included in the report.

Method of Approach:

Design one sub-circuit at a time and test each of these sub-circuits. Configure the sub-circuits together as a final step.If an event needs to persist (stay on), think “latching”.

Bonus marks:

You may add to this circuit to achieve bonus marks (instructor will assess value). Examples include:

  • An input code (sequence detection) for resetting the alarm.
  • A way of indicating on the one display if more than one zone is tripped
  • A self-reset system that, after approximately 8 seconds from the start of an alarm condition, will return the alarm to an armed state (use the clock input from the Vulcan board to count approximately 8 seconds).
  • …any other logic circuit addition that makes sense within the context of an alarm system.

Assessment:

1-Build a functional circuit on your breadboard.

  • Demonstrate its function to the instructor. This circuit will be assessed for functionality and neatness.

2-Create abrief report.

  • This report should include labeled circuit and sub-circuit diagrams, a block diagram and a brief user manual (minimum 1 page write-up). Structure your report with headers. A person reading the report must be capable of quickly cross-referencing the diagrams and tracing all the connections. All diagrams must be labeled. Include the “Group Contribution” below as the last page of the report.

Group contribution:

Discuss your individual contribution level between yourselves. Indicate eachindividual’s contribution as a percentage in the following areas:

Design and Research: name:______% name: ______%

Circuit Construction: name: ______% name: ______%

CPLD Design (if applicable):name: ______% name: ______%

Documentation: name: ______% name: ______%

Lab #12: Digital Alarm System

Updated October 18, 2018

Circuit Signoff Sheet

(Modified Version)

Description of the problem:

A security system detects open doors or windows and sounds an alarm. The alarm input devices include 2 basic switches to monitor a front and back door, 1 magnetic reed switch for window #1 and 1 push button switch for window #2. These switches are wired into “zones”, with the reed and push button switches in Zone “A”, a basic switch in Zone “b” and another basic switch in zone “C”. See the block diagram in the lab.

The alarm is considered “armed” when it’s monitoring its zones, and is considered “tripped” if any of the switches within its zone are activated.

Additional features include a counter that indicates the number of time the alarm has tripped, and an alarm sound and a display that indicate the tripped zone until the alarm circuit is re-armed.

Physical Circuit Requirements:

Requirement / Weight % / Achieved / Assessed %
Zone letter for tripped A, b or C zone, dash for armed. / 60
Persistent display on trip (returning the switch will not cause the alarm to reset) / 10
Alarm cycles to a holding maximum of 5. / 20
Oscillating alarm signal output that persists. / 10
BBonus
Wiring Neatness

Names: ______Date______

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