University of LeicesterPLUME Ref: PLM-COMS-BenchTestingComs-129-2

Date: 7/8/09

Bench testing the COMS prototype

Philip Peterson

Date / Updated Reference Number / Change
7/8/09 / PLM-COMS-BenchTestingComs-129-1 / First document
14/8/09 / PLM-COMS-BenchTestingComs-129-2 / Proofread version

1.1 Introduction

This document describes how to test the various components that make up the prototype of the satellite’s communication system.The document starts by outlining the procedure for using a desktop PC to send commands to the modem prototype board, which contains both a PIC modem and an RF Datatechtransciever.[4]

WARNING: Although the prototype modem board has an RS232-style connector, it is not directly RS232 compatible. An RS232 to 5V TTL level shifter must be connected between the modem board and a computer. Connecting the modem directly to a computer will break the modem. All components of the COMS system must be treated as static sensitive and suitable precautions must be taken when handling them.

2.1 Using the HP1650A logic analyser

A logic analyser is used to display digital signals in much the same way as an oscilloscope displays analogue signals. When used as a timing analyser, it simultaneously displays the voltage on multiple logic pins (iewhether they are at ‘high’ or ‘low’ voltage corresponding to a binary one or zero). By plotting these with respect to time, the analyser shows what a computer is ‘thinking’. The HP1650 logic analyser is an old model, but it is adequate to examine the communications between a desktop PC and the COMS modem/transceiver prototype board.

Full operation manuals for the HP1650A analyser are available on the HP/Agilent website[1].What follows is a description of how to set up the HP1650A from powerup and use it toanalyse logic signals from a generic circuit. Page references to the operations manual are written in red.

2.1.1 Connecting the analyser

The logic analyser has two main parts (Figure 2). The actual console itself is connected to ‘pods’, which sprout the wires that the analyser measures voltages with.

Figure 1: Logic analyser console (above) and pod (below) with connector wires.

A logic analyser pod has eighteen separate connectors. All but one connector wire ends in a plug like the one shown in Figure 2.

Figure 2: Connector wire plug

The one plug that does not have such a connector is the black ground connection. This must be connected to a common ground in the circuit, as it acts as a voltage reference for the other connectors. Another connector (labelled ‘CLK’) is used on microprocessor boards for the clock signal, which is not relevant here.

The probe connector can be fitted directly onto a pin (if the board to be tested has any), or plugged into a hook probe which can attach to loose conductors. The individual ground connections arealso not relevant to our experiment – stick with the main black one.

2.1.2 Analyser software

Figure 3: The front panel of the HP1650A.

Different fields on the logic analyser operating systemare selected by spinning the dial and hitting the‘select’ key when it stops at the desired field. The currently selected field is shown with a dark background. There are two kinds of field: fields that set different options and configurations which are shown with square corners, and fields that execute actions which have rounded corners.

Square fields can toggle options or produce dropdown menus when selected, or they can do one of the following.

  • Text entry boxes are a little clunky; spin the dial to choose the required letter and press the ‘select’ key to enter it. Use the ‘don’t care’ key to insert spaces, and the left and right arrows to backspace. Select ‘Done’ to enter the text.
  • Numeric entry boxes respond to both the dial and the number keys. Change the number from positive to negative with the ‘CHS’ key.
  • For assigning probes to labels on the format screen, an asterisk indicates a probe that is currently assigned to that label. Spin the dial to the probe you want to assign and hit select toggle it onto that label. The ID numbers of the probes are in ascending order from right to left, from zero to fifteen.
  • For setting trigger edges, an up arrow represents a probe’s voltage going from low to high, a down arrow vice-versa and a double headed arrow represents an oscillating probe. A trigger edge can be set for each channel that has been assigned to a label, and they are selected in the same way as above. Toggle the edge type using the select key.

To start using the logic analyser, make sure the operating system disk is in the drive and then turn on the power at the back of the machine. After it has finished booting up, it will show the system configuration screen.

The system configuration screen allows us to assign different ‘pods’ to one of the two logic analyzers in the HP1650, and allows you to change the mode of each analyzer. The system configuration defaults to using pod 1 with machine 1, which is set up as a timing analyser.If the cables at the back of the analyser have not been connected differently, these settings will do.

The operating system has five main screens. The first is the system configuration screen; to move between the others, press one of the four ‘mode’ buttons.

The formatscreen (p68) allows us to:

  • Set the threshold voltage level for deciding whether a particular channel is high or low. +1V is a useful level for 3.3V or 5V TTL signals. The pod activity box shows which of the channels are currently high, low or oscillating in real time. The threshold voltage you set here is used for every label.
  • Assign channel IDs to ‘labels’. Each label has its own trace on the display screen. Spin the dial to the label and hit select to turn the label on or off, or modify its name. When the probe is active, a box containing asterisks and periods appears to the right of the label name; move to this and press select to edit it. You can assign more than one channel to a label, and it will represent more than one trace on the display screen. The default is to have one label represent all 16 probes, which is adequate, but creating new labels representing one channel may make things clearer.
  • Tell the analyser whether the signal from a label should be inverted or not. The box specifying signal polarity is to the right of the label name.

The trace screen (p83) allows us to:

  • Set the trigger threshold for the logic analyser – the condition that starts the analyser recording. This is a little more complicated than for an oscilloscope. The ‘trace mode’ field should be set to repetitive and the ‘armed by’ field should be set to ‘run’. Leave the ‘acquisition mode’ on transitional. The trigger threshold can take the form of a specific pattern of bits coming into a particular channel (set using the ‘find pattern’ field) or a transition, or both. If a microprocessor circuit were being tested, looking for a particular pattern (say, a memory address) would be useful, but it is not necessary for coms and the patterns can be ignored by hitting the ‘don’t care’ key when the find pattern field is selected for editing. An X should appear in the pattern box. The analyser can also be triggered using transitions, where a particular channel flicks from high to low, or vice versa. This is the most useful way to trigger the analyser for the following work. Select ‘either way’ on all the probes being tested, which is represented by a double-headed arrow – enter it in the ‘Then find edge’ field. If the ‘then find edge’ field is not present, roll the dial over to the less-than sign in bottom field and press select to change it to a greater-than sign.

The display screen (p120) allows us to:

  • Examine the electrical response of the circuit. Pressing the ‘Run’ key on any screen switches to the display screen and tells the analyser to start acquiring data. If the triggers are correctly set, as soon as a signal is detected the analyser it will record it. Pressing the ‘stop’ key halts and displays the recording.
  • If the recording is not continuous (and most of the experiments will involve one-off bytes being sent back and forth) then it is important to set the delay field so that the trigger line is on the left side of the screen. For single measurements the analyser truncates data on the right side of the screen. The delay field and the secs/div field can be used to manipulate the display much as with an oscilloscope.
  • Measure time accurately. Setting the ‘markers’ field to ‘time’ produces an ‘x’ and ‘o’ marker that can be moved using their own delay fields. You can align these markers with parts of the trace to make precise time measurements.

Finally, the I/O option screen can be used to save a display screen or configuration to a floppy disk. Note that once the analyser is running the boot disk can be ejected (don’t lose it!) and any other double-density floppy can be used.

3.1 How the computer and modem communicate

The DE-9 socket on the back of the PC has nine pins, but only three are needed: one to provide a signal ground, one to transmit data from the PC to the modem, and one from the modem to the PC. The male connector pins are shown in figure 4. They have the same layout for both the PC and modem.

Figure 4: DE-9 socket male pin listing.

Both PC and modem use pin 2 to transmit data, and pin 3 to receive it. Connecting them directly would thereforenot work; the PC would transmit data into the modem’s transmit pin, and listen for a response to the modem’s receiving pin! The level shifters swap the connections for us, and you will see this when you test them. A serial cable has been made that also swaps the connections round, but it should not be used.

The male connector is the one that has nine visible pins surrounded by a trapezoid-shaped metal shroud. The female has a plastic façade with nine holes for the pins. The PC mounts a male connector, the modem a female one.

Computers communicate by sending little sequences of binary data called packets. The binary symbols 0 and 1 are represented by two different voltages. The voltages used are defined by the ‘communication protocol’ of the computers, which usually also specifies how many binary bits per second are to be transmitted and what form a binary word, or ‘packet’, should take. Many devices use packets that are eight binary numbers (bits) long, but our modem uses nine bits for each packet – eight bits for information, and a ninth control bit to indicate whether the information is a command to be executed or data to be stored. The speed at which the bits are transmitted is called the bit rate – 9600 bits per second for the COMS modem.

Our desktop PC uses the RS232 protocol, which states that the voltage representing a binary 1 should be between -3V and -15V, and the voltage representing binary 0 should be between +3V and +15V. In practice, the computer provides between ten to twelve volts. The modem, however, is designed to be operated by our satellite computer, which uses the TTL protocol. 5V TTL specifies that a binary 1 is represented by 5V and a binary 0 by 0V. This is the main obstacle to communication between the desktop PC and our modem. Connecting an RS232 signal into the modem would probably damage it, so a device called a level shifter is connected between PC and modem to convert the voltage. The level shifters are custom made for PLUME by the university electronics technicians, and are powered by an internal 9V battery. They are built around a MAX233CCP line driver chip [2].

Figure 5: Time evolution of the packet. The hashed squares represent bits that can be either zero or one depending on the command. The lettering illustrates that the modem takes commands sent most-significant-bit first; this command would have been entered ABCDEFGHX, where ABCDEFGH represent the information byte and X represents the control bit.

When the communication link between the PC and the modem is inactive, the pin through which they communicate is held at the binary 1 voltage. The transition to zero for the start bit tells the modem that it is about to receive either a command or some data. The eight information bits contain the message for the modem, and the control bit will be 1 for a command or 0 for a data byte. All packets end with a stop bit, which is binary 1, and helps the modem to distinguish between consecutive packets transmitted back-to-back. For most of the modem’s documentation [3], the start and stop bits are ommitted.

The modem’s command bytes have two parts; the three most significant bits detail the type of command, and the last five bits give command parameters, like the address of a variable that the controlling computer wishes to read. The command bytes sent by the computer to the modem are:

  • CFG000xxxxx – Configure. The second five bits tell the modem which variable to change. The modem should respond to this command with an ACK, after which a data packet should be sent to the modem containing the new value. Specific values for the second five bits and information on the format of the data packet can be found in the LRT manual.[3]
  • TXEND001xxxxx – End transmission. See TXSTT.
  • ENQ010xxxxx – Enquire. The enquire command is used to read variables from the modem. It should be answered by first a RQD command and then a data packet containing the requested information. Specific values for the second five bits can be found in the LRT manual.[3]
  • TEST011xxxxx – Instructs the modem and transceiver to go into test mode. The test type is selected with the last five bits. Setting these to 00000 brings the transceiver out of test mode.
  • SLEEP100xxxxx – Tells the modem to go to sleep, which stops it from receiving or transmitting data. The modem remains asleep until it receives any kind of packet, to which it will respond with a WAKAK – however, it will not execute the packet if it is a command. Use the WAKE command to revive the modem, as it does nothing if sent during normal operation. If the modem returns WAKAK unexpectedly, it means that you should resend the last piece of data.
  • TXSTT101xxxxx – Starts transmission. The last five bits control lead in delay. Once TXSTT has been sent and the modem switches to transmit mode, it will respond with ACK. The computer should then send data packets to the modem for transmission. Each one will be acknowledged with an ACK packet. Sent TXEND to stop transmission.
  • WAKE111xxxxx – The wake command should always produce a WAKAK in response from the modem. It has no function other than to wake the modem up from sleep. The second five bits should be left as 11111.

The modem sends the following command packets:

  • ACK00000000 – Most commands sent to the modem are responded to with an ACK packet. No packets should be sent to the modem until the ack packet is finished.
  • RQD00000001 – A special acknowledgement sent after an ENQ packet. The RQD will be followed by the requested data packet. RQD looks very similar to ACK.
  • WAKAK00000010 – This acknowledgement is only sent when the transceiver wakes from sleep or receives a WAKE command.

A simple program (mod_int) can be used to send commands to the modem board [reference]. It is written in Python, and may require additional software to work on CFS computers.It is located on the desktop of the darkroom computer. The computer in the darkroom lab has the required python interpreter, and so the program can be started by double clicking its icon.Type in a set of eight bits followed by either ‘c’ or ‘d’and then press return and the computer will send them through the COM port and then the first packet it gets in response. Note that if an ENQ packet is used, the program will display the RQD but not the actual requested data.

4.1 Testing the level shifters

A good practice exercise is to verify that the level shifters are operating correctly, and in the process familiarize yourself with the logic analyser.

Figure 6: RS232 to 5V TTL level shifter unit, showing opened 9-pin connector

4.1.1 Looking at RS232 signals

Connect the plain serial cable (the one without a level shifter attached to it) to the computer’s 9 pin COM port. On the maleend of the serial cable we can attach the logic analyser probes more easily.

The best way to attach probes to our DE-9 connectors is to unscrew the two screws on the top of the connector itself and attach probes to the soldering joints inside. Figure 7shows pins 2 and 3 connected to probes; remember to also attach the black connector to a probe hooked onto the green ground wire of pin 5.

Now, power up the PC and the logic analyser, and set up the analyser according to the procedure given in section 2.1.2. You’ll need to create two labels on the analyser, one for pin 2 and one for pin 3. Remember to assign them the channels corresponding to the probes you are using. RS232 signals have a large swing from positive to negative, practically any setting close to zero volts will be adequate.etting the threshold to 1.5V will allow the logic analyser to detect both RS232 and 5V TTL signals. The polarity of both labels needs to be set negative, as RS232 uses a negative voltage to signify a binary 1.