Recap: Chapter 1 Understanding How OS Works
Recap: Chapter 1 – Understanding How OS Works
operating system (OS) Computer software code that interfaces with user applicationsoftware and the computer’s BIOS to allow the applications to interact with the computerhardware.
basic input/output system (BIOS) Low-level program code that conducts basic hardware and software communications inside the computer. A computer’s BIOS basically resides between computer hardware and the higher level operating system, such as UNIX or Windows.
Computer Architecture
Multi-Core Processor
/ core The part of a processor used to read and execute instructions.cache memory Special computer memory that temporarily stores data used by the CPU. Cache memory is physically close to the CPU, and is faster than standard system memory, enabling faster retrieval and processing time.
Buses
bus A path or channel between a computer’s CPU and the devices it manages, such as memory and disk storage.
address bus An internal communications pathway inside a computer that specifies the source and target address for memory reads and writes. The address bus is measured by the number of bits of information it can carry. The wider the address bus (the more bits it moves at a time), the more memory available to the computer that uses it.
control bus An internal communications pathway that keeps the CPU informed of the status of particular computer resources and devices, such as memory and disk drives.
data bus An internal communications pathway that allows computer components, such as the CPU, display adapter, and main memory, to share information. Early personal computers used an 8-bit data bus. More modern computers use 32- or 64-bit data buses.
Simple one-bus CPU architecture
To keep this as simple as reasonably possible, we consider a simple instruction format in which every instruction is entirely represented in one word. That is, the word is divided into fields such as "opcode", "register number", and "memory address", which are always the same for all instructions, quite unlike the PDP-11 case. Furthermore, the memory address appears directly in the instruction word, not in a subsequent word (perhaps the words are wider than 16 bits).
Here is a simple one-bus architecture we'll use for most of our examples in this course. Data paths represented by the large arrows (namely, each arrow to or from the bus except for the ALU input, plus Zin) correspond to microprogram control lines.
Control lines also include Read and Write (memory functions), Wait MFC, the ALU functions, Set CC, Set Carry-In, Carry-Forward, Zero A, Complement B, and End.
Set CC causes the condition codes to be set by the current ALU operation. That is, it's the LOAD line for the condition code register.
Carry-Forward causes the C condition code to be supplied as Carry-In (i.e. the carry out from a previous ALU operation is supplied as the carry in to the new ALU operation). Set Carry-In supplies an unconditional '1' as Carry-In.
"Zero A" provides a zero value to the ALU which can be used in the same cycle, without affecting the contents of Y. That is, Zero A overrides the Y output with a zero value.
"Complement B" flips all of the bits in the 'B' ALU input (the one from the bus). This helps with two's-complement subtraction (which usually then also uses Set Carry-In to add one).
End makes the current microinstruction the last microinstruction of the microroutine by resetting the µPC.
There are also eight conditional microbranch control lines, of the form "If C then End", "If then End", and so on for all of C, V, Z, and N. ALU operations only set the condition codes if the Set CC bit is on (else we couldn't implement branch instructions with an offset without ruining the condition codes!). Note that when a microbranch is taken, the current microinstruction still completes, just as it does with the End control line.