Name ______
ES 330 Electronics II Homework # 7
(Fall 2017 – Due Monday, November 1, 2017)
Problem 1 (20 points)
Consider the NMOS transistor “current source” schematic circuit: [Note: This is more appropriately called a “current sink.” Why?]
For VDD = 1.3 volts and using I REF = 100 mA (microampreres), the design requirement for the circuit calls for the output current IO to be nominally around 100 mA. Transistors Q1 and Q2 are geometry matched in layout and both have gate length L = 0.5 mm and gate width W = 5 mm. The transistor parameters are as follows: the threshold voltage Vt = 0.4 volt and k’n = 500 mA/V2.
(a) Find the value of resistor R that gives I0 = 100 mA.
(b) In addition, the Early voltage V’A of the NMOS transistors is V’A = 5 V/mA. Find the NMOS transistor’s output resistance ro.
Problem 2 (15 points)
You are presented with the current steering circuit shown schematically below:
Find the value of current IO in terms of I REF and the device (W/L) ratios. For Q1 and Q2 denote the gate width-to-length ratios as (W/L)1 and (W/L)2 ; for Q3 and Q4 denote the gate width-to-length ratios as (W/L)3 and (W/L)4.
Problem 3 (15 points)
Consider the basic “current mirror” in Figure 8.7 of Sedra & Smith on page 518.
(a) Suppose transistor Q2 has m times larger emitter area than that of transistor Q1. [Note: This means that m ´ I REF = IO, where m is the current transfer ratio.] Show that the current transfer ratio (show the derivation of the equation) can be expressed as:
(b) If b is specified to be a minimum of 120, what is the largest current transfer ratio m if the error between I REF and IO is less than or equal to 10% at most?
Problem 4 (20 points)
The two NMOS transistors in the “current mirror” below have equal channel lengths of L = 0.5 mm, W1 = 10 mm, W2 = 50 mm, mnCox = 500 mA/V2 and an Early voltage V’A = 10 V/mm. The input bias current ID1 = 100 mA. [Note: The gate-to-source voltage vgs, and currents ii and io are all small-signal quantities.]
Derive expressions for the input resistance Rin, the current transfer ratio Ais and output resistance Ro. Evaluate the these three expressions using the parameter values for this current mirror.
Problem 5 (15 points)
Fiind the intriinsic gain of an NMOS transistor fabricated with a process for which k’n = 400 mA/V2 and an Early voltage V’A = 10 V/mm. The transistor process has a gate length L = 0.5 mm and is operated at VOV = 0. 2 volt. Suppose we require a transconductance gm = 2 mA/V, what must (a) the drain current ID and (b) the gate width W be to meet this requirement?
Problem 6 (15 points)
Consider the basic bipolar current mirror is shown below (Figure 8.7 on page 518 in Sedra and Smith). Assume transistors Q1 and Q2 are parameter matched and IREF = 1 mA. Also, neglect the effect of finite b {meaning IB = 0). Find the change in mirrored current Io as the output voltage Vo changes from one volt to 10 volts. The Early voltage |VA| is 90 volts. Express the change both in absolute value and also as percent change.