Fall 2006

To:SECS Faculty and CSE 378 students

From:Dr. Darrin Hanna,Assistant Professor of Engineering

Subject:CSE/ECE 378 – Computer Hardware Design

Course Title

Computer Hardware Design

Prerequisites
CSE 171 or EGR 240 and either major standing or conditional major standing

Text and Materials

Required: A USB portable storage device with capacity of 512 MB or more.

Required: Spartan-3 board available from

Enter OU378 in the Value code field

Recommended: Digital Logic and Microprocessor Design with VHDL, by Enoch O. Hwang, Thomson, 2006.

References:

  • VHDL Tutorial: Learn by Example
  • VHDL Tutorial
  • Xilinx Spartan-3 FPGA Family: Data Sheet (available on class website)
  • S3 Board Reference Manual
  • The FPGA Journal:

Class Time

Classes will be held on Tuesday and Thursday from 10:00 a.m. to 11:47 a.m. The labs will be held in Room 133, Science and Engineering Building (SEB). Labs will start on Monday, September11, 2006.

Course Objectives

By the end or this course a successful student will be able to:

  • Design combinational logic circuits using VHDL
  • Design sequential logic circuits using VHDL
  • Describe how combinational and sequential components can be used to design a datapath and control unit for performing logic operations
  • Describe how memory operates and is addressed
  • Synthesize VHDL designs to FPGAs
  • Simulate VHDL designs using a modern simulator
  • Design dedicated microprocessors using VHDL and synthesize them to an FPGA

Course Emphasis

This class will emphasize the use of VHDL in the design of digital systems. VHDL (VHSIC Hardware Description Language) had its origin in the U. S. Government's Very High Speed Integrated Circuits (VHSIC) program. It has since become an IEEE standard. It is widely used in industry to design complex digital circuits that will be implemented in either Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), or Complex Programmable Logic Devices (CPLDs).

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List of Topics:

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  • Digital Logic Circuits
  • Combinational Logic Circuits
  • Standard Combinational Components
  • Timing
  • Power
  • Implementation Technologies
  • Latches and Flip-Flops
  • Sequential Logic Circuits
  • Standard Sequential Components and RAM
  • Datapaths
  • Control Units
  • Dedicated Microprocessors

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In addition to the lectures the class will include a hands-on laboratory in which students will design digital circuits using VHDL and synthesize them to Xilinx FPGAs. Each of the labs will involve a digital design using VHDL.

Design Project

In addition to the eight labs each student will participate in a group project and demonstrate an original VHDL design by means of a PowerPoint presentation given to the class, a presentation poster that may be displayed publicly, and a project report.

Exams

There will be two exams during the semester.

Grading

Grading will be based of the following:

Labs 25% (~8 labs)

Homework10%

Exam 120%

Exam 220%

Design Project25%

100%

To pass the course a student must earn a passing grade (60% or higher) in the laboratory and on the Design Project, as well as in the course.

Office Hours:By Appointment and Walk-ins Welcome

114 Dodge Hall of Engineering

Tel: 248-370-2170

email:

Class Web Site:

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