ENGSCI 232 Computer Systems

Lecture 2: Digital Logic and Gates Lecture 3: Combinatorial Circuits

Boolean algebra

Boolean algebra is a calculus based on logical (ie boolean) values (1=true, 0=false) and logical operators.

Boolean algebra has a set of postulates, many of which are shown in the Truth Tables below. Here, x and y denote boolean values (either 1=true or 0=false).

false=0 / not (ie inverse)
true=1 / x / ~x=
0 / 1
1 / 0
and / nand / or / nor / xor / xnor
x / y / x*y / ~(x*y) / x+y / ~(x+y) / x–y
=xÅy / ~(x–y) / x*(~y) / (~x)*y / (~x)+y
0 / 0 / 0 / 1 / 0 / 1 / 0 / 1 / 0 / 0 / 1
0 / 1 / 0 / 1 / 1 / 0 / 1 / 0 / 0 / 1 / 1
1 / 0 / 0 / 1 / 1 / 0 / 1 / 0 / 1 / 0 / 0
1 / 1 / 1 / 0 / 1 / 0 / 0 / 1 / 0 / 0 / 1
x*1= / x / identity
x+0= / x / identity
x*(~x)= / 0 / complement
x+(~x)= / 1 / complement
x*y= / y*x / commutative
x+y= / y+x / commutative
x*(y+z)= / (x*y)+(x*z) / distributive
x+(y*z)= / (x+y)*(x+z) / distributive

Notes:

·  As in standard maths, we often write A·B or just AB to mean A*B

·  When we write a+b*c, ~a*b and a-b+~c*d we will follow standard computing conventions (as in VB) of first NOTing, then ANDing (*), then ORing (+),then XORing (-), thus assuming these mean a+(b*c), ((~a)*b), and a-(b+((~c)*d)) respectively.

From these postulates, we can prove the following theorems:

x*0= / 0 / zero theorem
x+1= / 1 / one theorem
x*(~x)= / 0 / idempotence
x+(~x)= / 1 / idempotence
(x*y)*z= / x*(y*z) / associative
(x+y)+z= / x+(y+z) / associative
~(~x)= / x / involution
(~x)*(~y)= / ~(x+y) / de Morgan’s rule /
(~x)+(~y)= / ~(x*y) / de Morgan’s rule /
x+(x*y)= / x / Absorption
x*(x+y)= / x / Absorption

Note: In its most general form, DeMorgan’s rule says:

“To obtain the inverse (ie ‘not’) of any function involving AND and/or OR operations, invert all variables and replace all ORs by ANDs and all ANDs by ORs.”

Example: Simplify = (x+~w) * y

The laws of Boolean algebra can be used to analyse and simplify combinatorial digital circuits.

By using Boolean algebra problems of combinatorial digital circuit designs can be reduced to the solution of algebraic problems.

Exercises.

Evaluate the following expressions

((1+0)-(1*1))*(1-1)=(1-1)*(0)=0*0=0

((1*0)*(1*1))-(1-1)=(0*1)-(0)=0-0=0

Show that is equivalent to a simple NAND operation.

= (~A+~B) + A*(~B) De Morgans Rule

= ~A + ~B(1+A) Distribution

= ~A+~B (1+A=1)

=

Complete the following truth tables.

x / y / (x+y)*(x-y) / x / y / (x*y)*(x-y)
0 / 0 / 0 / 0
0 / 1 / 0 / 1
1 / 0 / 1 / 0
1 / 1 / 1 / 1

Transistors

In 1947, Dr. John Bardeen, Dr. Walter Brattain, and Dr. William Shockley discovered the transistor effect and developed the first device at Bell Laboratories in Murray Hill, NJ.

They were awarded the Nobel Prize in physics in 1956.

In a transistor, currents flow from the base to the emitter, and from the collector to the emitter. A small base/emitter current ic can be used to control a much larger collector/emitter current ic according to the relationship

ic @ bib,

where typically b=100.

Transistors and Boolean Logic

Using a Transistor to form a Logic Gate

We can use transistors to physically build the logic operations introduced by Boole. Let’s define +5V to mean 1=true, and 0V=0=false, and consider the following circuit.

Note: All voltages are relative to ‘earth’ or ‘ground’ (denoted Gnd).

If Vin=0 (false), ib=zero ic=negligible => Vout=+5V (true)

If Vin=+5V (true), ib=small ic@large => Vout=0V (false)

Thus, we have an built an invertor

Logic in Hardware - Logic Gates

We can combine transistors in clever ways to implement all the logic operations. We form each logic device a gate. We can now build circuits that implement complex logic expressions.

We can also form gates with more than 2 inputs.

Example: Build a digital circuit to implement p=(x+y)*z.


Exercise: Give the truth table for the following circuit. Note that ‘c’ and ‘d’ represent intermediate values, and are there to help your thinking!

A / B / c / d / E
0 / 0 / 1 / 0 / 1
0 / 1 / 1 / 1 / 1
1 / 0 / 1 / 0 / 1
1 / 1 / 0 / 0 / 0

Comment: Actually a NAND gate

Exercise: Build a 2-input OR gate E=A+B from 3 NAND gates.

Truth Table Check:

A / B / c=~A / d=~B / E=!(cd)
0 / 0 / 1 / 1 / !1=0
0 / 1 / 1 / 0 / !0=1
1 / 0 / 0 / 1 / !0=1
1 / 1 / 0 / 0 / !0=1

Comment: A+B=~(~A*~B) - De Morgan’s Theorem

Building Circuits from Truth Tables

Often we have a truth table that we wish to implement using digital logic, preferably using as few gates as possible to keep costs down. A Karnaugh map helps us do this.

Consider the following truth table which gives Z in terms of inputs A, B and C. We could form a boolean expression for this simply by OR’ing all the individual combinations that give Z=1. This gives…

A / B / C / Z
0 / 0 / 0 / 1 / Z=…
0 / 0 / 1 / 0
0 / 1 / 0 / 1 / + B
0 / 1 / 1 / 1 / + B C
1 / 0 / 0 / 1 / + A
1 / 0 / 1 / 0
1 / 1 / 0 / 0
1 / 1 / 1 / 1 / + ABC

This leads to the expresssion:

Z = + B + B C + A + ABC

which gives the digital logic circuit

But, this can clearly be simplified:

Z = + B + A + ABC + B C

= (+ B) + A + BC (A + )

= + A + BC

= (+A) + BC

which gives the simpler (and hence cheaper!) circuit

Karnaugh Maps

An easy way to help with simplifying circuits is to build Karnaugh maps. To build a Karnaugh map, we complete the following steps. (We illustrate these steps with the A,B,C,Z truth table considered above.)

·  divide the input variables into two groups one for rows and one for columns,
eg…..rows =……AB, and columns=……C

·  for each group, enumerate all possible values for the variable groups, ordering this so that we only change the value of 1 variable when going from one value to the next. For groups with 1, 2 or 3 variables, typical orderings might be

1 variable / 2 variables / 3 variables
0 / 00 / 000
1 / 01 / 001
11 / 011
10 / 010
110
111
101
100

·  Build a table that lists the output value for each combination of inputs. (You may leave out the zero's if you wish, but be sure to say so; see below.)

Truth Table / Karnaugh Map
A / B / C / Z / C=0 / C=1
0 / 0 / 0 / 1 / -> / AB=00 / Z= 1
0 / 0 / 1 / 0 / 01 / 1 / 1
0 / 1 / 0 / 1 / 11 / 1
0 / 1 / 1 / 1 / 10 / 1
1 / 0 / 0 / 1 / (Z=0 if blank)
1 / 0 / 1 / 0
1 / 1 / 0 / 0
1 / 1 / 1 / 1

·  Circle adjacent 1’s (either pairs, foursomes, 8-somes, 16-somes or some other power of 2) in the map; for the circled outputs, there is one (or more) variables the associated AND expression will not depend on.
Note: The bigger the circle, the simpler the boolean expression.
Your circles can overlap each other.

·  Build AND expressions for each circle (and any remaining 1’s), and then OR these together as before.

Eg, Z= + BC + A

It is then easy to build a circuit that implements this expression.

·  (Optional) Make any further manual improvements you can.

Note: The choice of variables in the groups, and order of their values may effect the expression you obtain.

Exercise: Build a logic expression for the following Karnaugh table that defines Z in terms of A, B, C, and D.

CD=00 / 01 / 11 / 10
AB=00 / Z= / 1 / 1
01
11 / 1 / 1
10 / 1 / 1

(Z=0 if blank)

Z=D+AC

Exercise: Build a logic expression for the following Karnaugh table that defines Z in terms of A, B, C, D and E. ‘X’ means we don’t care what the output Z is; we will choose the value for Z that makes our expression the simplest. Hint: Go for 4 big overlapping circles.

DE=00 / 01 / 11 / 10
ABC=000 / Z= 1 / 1 / 1 / 1X
001 / 1
011 / 1X / 1
010 / 1 / 1
110
111
101 / 1 / 1
100 / 0<-X / 0X / 1 / 1

(X=Don’t care. Z=0 if blank)

Z=(red) + E (purple)
+ BE (green)+ AD (blue)

Real vs Ideal Components

Because voltages cannot change instantaneously, all real devices have propogation delays where the actual output lags behind that expected theoretically. While the voltage is changing, we have voltages that are not 0V or 5V that are often input to a second device. A device has some arbitrary cutoff (eg 2.5V) above which the input is interpreted as a true and below which as false.

For example, consider an inverter. When input goes 0V -> 5V, output goes 5V -> 0V but NOT instantly. When the input goes 5V -> 0V, output goes 0V -> 5V but NOT instantly.

Exercise: For the input shown below, plot the output of the circuit shown. Va is the voltage between the two inverters.

We can often treat real devices as having a delayed but instantaneous 0®1 or 1®0 change. The delay is termed the … propogation delay.

Exercise: For the input shown below, plot the output of the circuit shown. Assume a propogation delay of 5ns (nano seconds) for each of the 3 devices.

Logic Gate Technologies

TTL=Transistor-to-Transistor Logic

·  high speed; approximately ….9ns to switch

·  low power consumption - ………10mW per gate

·  S-series (Shottky), LS (low power schottky), ALS = advanced LS

CMOS=Complementary Metal Oxide Semiconductor

·  complex construction

·  sensitive insides - easily damaged by static charges

·  only consumes 0.01 mW/gate when idle, and a bit more power when switching

·  low maximum output current (can’t drive large loads)

+ others

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