CPR E 210 Lab 11
Arithmetic Logic Unit Design
11.0Objectives
The Arithmetic Logic Unit (ALU) is the component that computes all logic in a computer. The functionalities of an ALU depend on the operation codes (Opcode) applying to the ALU. In this lab, the ALU component will be created based on the given functionalities.
11.1Arithmetic Logic Unit (ALU)
An Arithmetic Logic Unit (ALU), as the name suggests, performs both the arithmetic operations and logical operations of a computer. Arithmetic operations include addition and subtraction operations, while logical operations are AND and OR operations.
Open the file Lab11Step1.gdf and set the project to current file. An ALU symbol should be shown here but there is no internal circuit associated to this symbol. You will be designing the entire ALU from scratch. First off, the block diagram of the ALU is given in Figure 11.1. The operations of the ALU are listed in the following table according to its corresponding operation code. The bit-slicing approach will be used in designing this ALU.
Figure 11.1: Block Diagram of an Arithmetic Logic Unit
Op2 / Op1 / Op0 / Operations0 / 0 / 0 / A + 1
0 / 0 / 1 / A – 1
0 / 1 / 0 / A + B
0 / 1 / 1 / A – B
1 / 0 / 0 / A OR B
1 / 0 / 1 / A AND B
1 / 1 / 0 / A
1 / 1 / 1 / B
Note that there are a total of eight operations, each represented by a unique operation code. Before constructing the ALU, first identify its behavior. The ALU consists of two 4-bit data inputs, one 3-bit operation code input, and one 4-bit output. Hence, we know that in order to perform either an addition or a subtraction, the adder/subtractor need to take in 4-bit inputs as well. The same goes for the logic gates AND and OR. The 4-bit adder can be decomposed into four 1-bit adders. The hierarchical decomposition of the ALU design is shown in Figure 11.2.
Figure 11.2: Hierarchy Decomposition of the ALU Design
Let’s start off by creating the 4-bit AND gate and 4-bit OR gate. Create a new file, 4bAND.gdf and set the project to current file. Insert a symbol named and2 to the design. AND gate is one of the primitive gates available in the MAX+PLUS II library. The number that comes after the symbol name indicates the number of inputs to the gate. For example, and3 is the symbol name for a three inputs AND gate.
Using the and2 symbol, complete the design for 4bAND and create a default symbol for it. You only need to Save & Check this file. (Do not need to click Start button.) Repeat the same process to design the 4bOR symbol. The filename for the 4bOR symbol should be 4bOR.gdf. Have your lab instructor initials when you have created both 4bAND and 4bOR symbol.
Next, create a new file, 1bADDER.gdf and set the project to current file. This is the design for 1-bit ADDER. Note that subtraction can also be done using the ADDER by inverting the subtractor and supplying a Cin. Construct a truth table for the Sum and Cout based on A, B, and Cin. From the truth table formularize the sum of product for both Sum and Cout. Use the sum of product function that you produced to design the 1bADDER. Save & Check this file and create a default symbol when the design is complete. Show your 1bADDER design to your lab instructor for initial.
Create another new file, 4bADDER.gdf and set the project to current file. This adder will utilize four 1bADDER. Complete the internal circuit and create a default symbol for 4bADDER as well. Present the 4bADDER to your lab instructor for initial.
We now have all the necessary components to construct the ALU. Create another new file, ALU.gdf and set the project to current file. In this file, we will need to create another two MUXes, 4b2x1MUX and 4b8x1MUX, in order to connect everything together. Note that the 3-bit operation codes will be directing the 4b8x1MUX for the corresponding output. For operation A + 1 and A – 1, you will need to create a constant value that supply a 4-bit value of “1”. To do that, create a symbol named ONE from LPM_CONSTANT from the Gates Category, and also 4bNOT from LPM_INV from the Gates Category as well. When the ALU design is completed, Save & Check this file and have your lab instructor check and initial.
Switch back to Lab11Step1.gdf window. Save & Compile the ALU in this window. Then, create a waveform for the ALU symbol, and simulate for all possible operations. Demonstrate the simulation to your lab instructor.
11.2Saving Important Files
Upon completion of section 11.1, you need to store your design for the use in next lab. Here is the list of files that you need to save either in your own disk or FTP them to your Vincent account.
CORRECTION: Before you copy the following files into the same folder in Lab 10, rename the files 4bADDER.gdf from Lab10Step2 to 4bADDONE.gdf, and 4bADDER.sym to 4bADDONE.sym. Then update the PC.gdf design so that the 4bADDER symbol will be changed to 4bADDONE. To do that, copy the six files mentioned in 10.3 for Lab10Step2 back to the computer and edit PC.gdf to change the symbol to 4bADDONE. Then, Save & Check and copy all the six files back to your own storage again. Once you done this, proceed to save the following files.
C:\CprE210\Lab11\Lab11Step1\1bADDER.gdf
C:\CprE210\Lab11\Lab11Step1\1bADDER.sym
C:\CprE210\Lab11\Lab11Step1\4bAND.gdf
C:\CprE210\Lab11\Lab11Step1\4bAND.sym
C:\CprE210\Lab11\Lab11Step1\4bOR.gdf
C:\CprE210\Lab11\Lab11Step1\4bOR.sym
C:\CprE210\Lab11\Lab11Step1\4bADDER.gdf
C:\CprE210\Lab11\Lab11Step1\4bADDER.sym
C:\CprE210\Lab11\Lab11Step1\ALU.gdf
C:\CprE210\Lab11\Lab11Step1\ALU.sym
C:\CprE210\Lab11\Lab11Step1\ONE.tdf
C:\CprE210\Lab11\Lab11Step1\ONE.sym
All of these files can be kept in the same folder you saved for Lab 10. You will need these files in a week time.
11.3Finishing Off
Close MAX+PLUS II Software, delete the folder C:\CprE210\Lab11\ completely and empty the recycle bin. Then, extract the file C:\Download\CprE210\210Lab11.ZIP to the folder C:\CprE210\ for the next lab use. Sign and turn in the answer sheet for Lab 11. This completes the lab session.