Simultaneous Capacitance Voltage (CV) Measurement

Simultaneous Capacitance Voltage (CV) Measurement

FACULTY OF ENGINEERING

LAB SHEET

ENT 3036 SEMICONDUCTOR DEVICES

TRIMESTER 2 2010-2011

SD2 – C-V MEASUREMENT OF MOS CAPACITOR

*Note: On-the-spot evaluation may be carried out during or at the end of the experiment. Students are advised to read through this lab sheet before doing experiment. Your performance, teamwork effort, and learning attitude will count towards the marks.

1. Introduction

1.1 What is Capacitance Voltage (CV) Measurement

·  It is the measurement of device capacitance against a sweep voltage

·  The capacitance of the device is measured at quasistatic (very low frequency of mHz) and high frequencies (either 100kHz or 1MHz)

·  Best measurement results are obtained from measuring both low and high frequencies simultaneously

·  Measured data is used as information of device characterization and process adopted

1.2 MIS Capacitor

·  Base on Metal Insulator Semiconductor structure

·  Most common is Metal (Polysilicon), Oxide-Semiconductor Capacitor (MOSCAP)

·  Devices can be transistors (MOSFET), P-N junctions or Schottky diodes

1.3 Why MIS Capacitor?

·  Simple structure, easy to fabricate

·  Readily integrate into process

·  Similar to MOSFET structure, just add Source and Drain

1.4 Objectives:

1. To investigate the effect of low and high frequencies on the operating modes of a MOS capacitor

2. To analyse the device parameters of a MOS capacitor from C-V measurement

2. CV Measurement System

2.1 Keithley 82-WIN CV System

The Keithley model 82-WIN Simultaneous CV System consists of the following components:

·  Keithley model 590 / 100k /1M CV Analyzer

o  Source a high frequency of 100 kHz or 1 MHz selectable signal to the Device Under Test (DUT) and measures the Capacitance, termed as CH.

·  Keithley model 595 Quasi-static CV Meter

o Keithley model 595 Quasi-static CV Meter

o Source a low frequency (almost DC Voltage) signal to the DUT and measures the Capacitance, termed as CQ.

o Provides the step voltage (max. of 40 V range) for simultaneous CV measurement

o Measures the leakage current through the DUT, (Q/t).

o Provides triggering to Keithley model 590 / 100k / 1M CV Analyzer

·  Keithley model 230-1 Programmable Voltage Source

o Provides a DC offset bias voltage of +/- 100 V

·  Keithley model 5951 Remote Coupler

o Consists of tuned and resonant circuits to separate the low and high frequencies for simultaneous CV measurements. Ensures minimal interaction between instruments when performing measurement

o Acts as the interface to connect between DUT and instruments for simultaneous CV measurement

·  Metrics Interactive Characterization Software (ICS)

o Software control of instrument interface, data acquisition and analysis and test setup

·  System Controller

o Installed with General Purpose Interface Bus (GPIB) conforming to IEEE488.2 for communication between Software and instruments

2.2 Hardware Connection Diagram

Figure 2.2 shows the cable connection between the instruments.

Note: All connections to the model 5951 Remote Input Coupler are to use Keithley model 4801 low noise co-axial cables. Failure to comply with this will result in unreliable data measurement.

Figure 2.2

2.3 GPIB Address of Instruments

The GPIB addresses of the instruments are to be set as follow:

·  Keithley model 590: Address 15

·  Keithley model 595: Address 28

·  Keithley model 230: Address 13

Please ensure that the addresses of the hardware and software are the same settings.

3. Typical CV Measurement Characteristic

·  Two Curves

o Quasistatic CV (low frequency)

o High Frequency CV (100kHz or 1MHz)

Figure 3.0 shows a typical simultaneous CV measurement for a p-type semiconductor of a MOS-CAP structure

Figure 3.0: Typical Simultaneous CV (p-type)

3.1 Fundamentals of CV Measurement

A typical CV measurement will consists of three regions:

·  Accumulation region

In the accumulation region, the majority carriers will accumulate near the semiconductor surface.

Capacitance = Oxide Capacitance, Cox

Figure 3.1.1: Accumulation (p-type)

·  Depletion region

When the device starts to deplete, the majority carriers will be push away from the semiconductor surface. Separation of High and Low Frequency begins to take place due to generation of minority carriers and Interface Traps.

Capacitance = Oxide Capacitance, Cox and Depletion Layer Capacitance in series

Figure 3.1.2: Depletion (p-type).

·  Inversion region

During Inversion, minority carriers will be generated and dominant near the semiconductor surface. Semiconductor Surface Charge is inverted. Minority carriers do not respond to high frequency stimulus and generation are relatively slow.

Capacitance = Oxide Capacitance and Maximum Depletion Layer Capacitance in Series.

(For High Frequency Only)

Low Frequency Capacitance = Oxide Capacitance

Figure 3.1.3: Inversion (p-type).

3.2 Characteristic of CV

Figure 3.2.1 shows a typical CV characteristic of p-type MOS-CAP (MOS-C) while Figure 3.2.2 is that of an n-type MOS-CAP.

Figure 3.2.1: p-type material

Figure 3.2.2: n-type material

·  Oxide Capacitance, Thickness and Gate Area

The oxide capacitance, Cox is the high frequency capacitance with the device biased in strong accumulation. Oxide Thickness, Tox is calculated from Cox and the gate area as follows:

Tox= Aeox / Cox EQ (3.2.1)

Where: Tox is the Oxide Thickness in nm

A is the Gate Area in cm2

eox is permittivity of oxide material in F/cm (3.4 E-13)

Cox is oxide capacitance in F

Note: eox and other constants are initialized for use with silicon substrate, silicon dioxide insulator and aluminum gate material, but may be changed for other materials.

·  Threshold Voltage

The Threshold Voltage, VTH is obtained when the surface potential, yS is twice that of the bulk potential, fB (Please refer to Figure 3.2.1 and 3.2.2). This corresponds to onset of strong inversion of MOS-CAP. For an enhanced mode MOSFET, VTH correspond to the point where the device starts to conduct.

The VTH can be calculated from:

VTH = [ ± (A / Cox){Ö(4eSq |Nbulk| |fB|)} +2|fB|] + VFB EQ (3.2.2)

Where: A is the Gate Area in cm2

Cox is the oxide capacitance in Farads, F

eS is the permittivity of substrate material (F/cm) [material constant=1.04E-12]

q is the electron charge of 1.60219 x 10-19 coul

fB is the Bulk potential in V

Nbulk is the bulk doping concentration in cm-3

·  Flatband Voltage (VFB) and Capacitance (CFB)

The Keithley model 82-WIN uses the flatband capacitance, CFB method of finding flatband voltage, VFB. The extrinsic debye length, l is used to calculate the ideal value of flatband capacitance and can be calculated as follow:

l = Ö(eSkT / q2Nx) EQ (3.2.3)

Where: kT is the thermal energy at room temperature (4.046E-21) in Joules, J

Q is the electron charge (1.60219E-19) in columbs, coul

Nx is N at 90% Wmax or NA or ND when input by user

N at 90% Wmax is chosen to represent the bulk doping

Once the value of CFB is known, the value of VFB is interpolated from the closest Vgs value. Based on doping, the calculation of CFB uses N at 90% Wmax, or user-applied NA (bulk doping for p-type, acceptors) or ND (bulk doping for n-type, donors) The Flatband capacitance is first calculated as follows:

CFB = (CoxeSA / l) / (Cox + eSA / l) EQ (3.2.4)

Where: A is the Gate Area in cm2

Cox is the oxide capacitance in Farads, F

eS is the permittivity of substrate material (F/cm) [material constant=1.04E-12]

l is the extrinsic debye length

At Flatband, surface potential is zero.

3.3 Doping Profile

·  Depletion Depth vs Gate Voltage

The doping profile is plotted as Depletion Depth vs Gate Voltage (Vgs). For the Keithley model 82-WIN, the system computes the depletion depth, W from the high frequency capacitance and oxide capacitance at each measured value of Vgs. In order to graph this function, each W element needs to be computed as follows:

W = AeS [(1 / CH) – (1 / Cox)] EQ (3.2.5)

Where: W is the depletion depth expressed in um

eS is the permittivity of substrate material, 1.04E-12 F/cm

CH is the high frequency capacitance in F

Cox is the oxide capacitance in F

A is the gate area in cm2

·  Doping Concentration vs Depth

The doping profile of a device is derived from the CV curve based on the definition of the differential capacitance (measured by Keithley models 590 CV Analyzer and 595 Quasistatic CV Meter) as the differential change in depletion region charge produced by a differential change in gate voltage.

Standard Doping (N) vs Depletion Depth(W) does not compensate for onset of accumulation and is accurate only when in depletion. In the Keithley model 82-WIN, in order to correct for errors caused by interface traps, the error term [{1 – (CQ / Cox)} / {1 – (CH / Cox)}] is included in the calculations in the extraction of the doping concentration and termed as Corrected Doping Concentration, NCORR.

The extraction of the concentration level will be extracted at 90% depletion depth.

3.4 Interface Trap Density

The Interface Trap Density, DIT is calculated from Interface Trap Capacitance, CIT as follows:

CIT = [(1 / CQ) – (1 / Cox)]-1 – [(1 / CH) – (1 / Cox)]-1 EQ (3.4.1)

Thus from EQ (3.4.1)

DIT = CIT / A EQ (3.4.2)

Where: CIT is the Interface Trap Capacitance in F

DIT is the Interface Trap Density in cm-2 eV-1

CQ is the Quasistatic Capacitance in F

CH is the High frequency Capacitance in F

Cox is the Capacitance Oxide in F

A is the gate Area in cm2

4. CV Measurement Procedure

4.1 Equipment Requirement

·  Experiment Wafer and Wafer Map Sheet

·  Keithley model 82-WIN Simultaneous CV Measurement System consisting of components as listed in Section 2

·  MicroManipulator model S6-EVG probe station (vacuum type) with enclosure / light source consisting of:

o 2 x co-axial manipulators / probes

o 1 x 6” chuck

·  Glove / Twister for Wafer handling

4.2 Connection

Please check the system connection with the diagram as in Figure 2.2. Once the connection is established, power on the CV measurement system by pushing the power ON / OFF switch of the respective instruments / equipments:

·  Keithley model 590 CV Analyzer

·  Keithley model 595 Quasistatic CV Meter

·  Keithley model 230-1 Programmable Voltage Source

·  The light source for MicroManipulator model S6-EVG probe station

·  Vacuum pump

4.3 Setup Procedure

Turn the vacuum switch to “OFF” position to disable the vacuum. (Switch is positioned on the right of the chassis probe enclosure) Place the assigned experiment wafer on top of the chuck and turn “ON” the vacuum switch. Ensure that the wafer is positioned properly on the chuck. Check the wafer map sheet and select a appropriate site for your CV measurement from the listed wafer map sheet. Position the tip of the probe that is connected to the OUTPUT of Keithley model 5951 (adjust using the X, Y and Z-axis fine adjust) on the DOT wafer that CV measurement is to be performed. Ensure that the tips are just contacting the DOT wafer and not scratching it. Similarly, position the tip of the probe that is connected to the INPUT of Keithley model 5951 (adjust using X, Y and Z-axis fine adjust) on the top surface of chuck. Once the probes are properly positioned to the DOT wafer, probe up again for both left and right probes. (That is, the tips of the probe should not make contact with the DOT wafer or chuck) Close the probe station enclosure.

4.4 Starting Metrics ICS and Setup of Experiment

Double-Click on the Metrics ICS icon on the Desktop to execute Metrics ICS for CV Measurement.

4.4.1 Selection of Experiment File

·  From the File Menu Options, Select “File Open”.

·  From the Attribute #1, Select “Expt” from the drop-down list and click “OK” when done.

·  The Project file that was opened will consist of the Setup for CV measurement for this experiment.

Figure 4.4.1A: File Open Select

Figure 4.4.1B shows the Project File named “Expt” of the CV measurement experiment

4.4.2 Loading of Calibration File Constant

·  From the icon option, click “Setup Editor”

·  From Setup Editor Menu, click “Opts” icon

·  The KI82 options Setup Menu will be prompted

Figure 4.4.2: Setup Editor Menu

·  Select “Load cal….”

·  Select the most appropriate CAL file to use for the experiment. Please note that only calibration constant files having the extension .CAL can be selected.

·  Once the appropriate calibration constant file is loaded, press “OK”.

Note: Calibration constant file is required to compensate for the High Frequency offset of the connecting cables during measurement so as to obtain a more reliable and accurate capacitance reading. Please check with relevant personnel on the correct calibration file constant to be loaded.

4.4.3 Setup of Test Conditions for CV Measurement

·  From the Setup Editor (See Figure 4.4.2), click on the OUT instrument icon (That is connected to the Gate,G Terminal), the Source Setup for KI82-WIN will appear as in Figure 4.4.3.

·  Depending on the wafer provided for the experiment, select an appropriate site for the CV measurement that is listed on the wafer map sheet (As done in procedure 4.3).

·  From the wafer map sheet, check the Start and Stop Voltage of the wafer site selected and key the respective values to the “Start V” and “Stop V” accordingly.

·  Select 20mV as the “Step V”

·  Select “Mode” to Single Stair

·  Select 100kHz for High Frequency Stimulus

Figure 4.4.3: KI82-WIN Setup

·  Select “Delay” to be 0.1

·  From the Time measurement bias, set “Bias Voltage” equal to the voltage at “Start V”

·  Select Range of measurement for 590 to 2nF and 595 to 20nF

·  Check the “Leakage Correction” box

·  Select Filter to “3rdg”

·  Click “OK” When completed and return to Editor Setup Menu

4.4.4 Defining Pre-Stress Time

·  From the Editor Setup Menu, click on Time icon to activate the Time Parameter Setup Dialogue.

·  Check on the “Sec” box to select units of time measurement to be in seconds