Background Statement for SEMI Draft Document 5795

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Background Statement for SEMI Draft Document 5795

NEW STANDARD: TEST METHOD FORCONTACTLESS RESISTIVITY MEASUREMENT OF SEMI-INSULATING SEMICONDUCTORS

Notice: This background statement is not part of the balloted item. It is provided solely to assist the recipient in reaching an informed decision based on the rationale of the activity that preceded the creation of this Document.

Notice: Recipients of this Document are invited to submit, with their comments, notification of any relevant patented technology or copyrighted items of which they are aware and to provide supporting documentation. In this context, “patented technology” is defined as technology for which a patent has issued or has been applied for. In the latter case, only publicly available information on the contents of the patent application is to be provided.

Background statement

A number of compound semiconductors, presently including GaAs, InP, SiC, CdTe, Cd(Zn)Te, GaN and AlN, can be grown as single crystals with high electric resistivity. Semi-insulating wafers fabricated from these ingot materials are essential for a satisfactory performance of a range of microelectronic devices operating at high frequency and/or high output power. A standardized test method for routine assessment of the substrate resistivity, meeting the requirements of the industrial production environment, is necessary. It should be rapid, highly reproducible and preferentially non-contacting. Topographic evaluation of resistivity variations to verify specifications across entire wafer areas is desirable.

The metrologic issue to evaluate resistivity without cutting a test sample and generating galvanic contacts has previously (1998) been addressed by DIN Norm 50448. This now technically outdated document was formally withdrawn by DIN in 2008. The present document has independently been developed and written by the SEMI TF, taking into account the current technical status and SEMI style requirements.

Review and Adjudication Information

SEMI Draft Document 5795

NEW STANDARD: TEST METHOD FORCONTACTLESS RESISTIVITY MEASUREMENT OF SEMI-INSULATING SEMICONDUCTORS

1 Purpose

1.1 The purpose of this document is to specify methods for the contactless measurement of the resistivity of semi-insulating samples and wafers.

2 Scope

2.1 This standard test method covers the determination of the electrical resistivity of semi-insulating semiconductors, including GaAs, InP, CdTe, Cd(Zn)Te, SiC, GaN, and AlN, within the resistivity range 1E5 to 1E12 Ohmcm. It may also be used to characterize other resistivity materials exhibiting resistivity in this range, including in particular high resistivity silicon.

2.2 The procedures described in this standard measure the time constant of a networkconsisting ofthe resistive sample and the series capacitance of the sample and the capacitive sensor. Alternatively, a plate sensor (PS ¶ 6.2) or ring sensor (RS ¶ 6.3) may be used. The evaluation is based on the observationof the time-dependent charge transfer after application of a voltage step (time domain (TD) evaluation described in Appendix 1)or on measuring the frequency response of the network (frequency domain (FD) evaluation described in Appendix 2).

2.3 Commercially available measurement system configurations offer the PS combined with TD evaluation and the RS combined with FD and TD evaluation. Topographic evaluation of the sample area is available as well as temperature dependent resistivity measurement to evaluate the activation energy ∆E, needed to normalize measured data to a reference temperature (§ 9).

2.4 The document follows the roadmap laid out by SEMI M54 (GaAs) and SEMI M55 (SiC), identifying resistivity as an essential material parameter.

NOTICE: SEMI Standards and Safety Guidelines do not purport to address all safety issues associated with their use. It is the responsibility of the users of the Documents to establish appropriate safety and health practices, and determine the applicability of regulatory or other limitations prior to use.

3 Referenced Standards and Documents

3.1 SEMI Standards and Safety Guidelines

SEMI M54 – Guide for Semi-Insulating (SI) GaAs Material Parameters

SEMI M55 – Specification for Polished Monocrystalline Silicon Carbide Wafers

NOTICE: Unless otherwise indicated, all documents cited shall be the latest published versions.

4 Terminology

4.1 Definitions of symbols and equations

4.1.1 ρ [Ω•cm]– Resistivity of the resistive material under test.

4.1.2 Rs[Ω] – Resistance of a defined, but not mechanically separated portion of the sample under test.

4.1.3 R [Ω] = ρ L / A – Resistanceof a specimen of resistive material, where L [cm] is the length along the current direction and A [cm2] the cross section perpendicular to the current direction..

4.1.4 Ca, Cs [pF]– Capacitances of the air gap and of the evaluated portion of sample below the top electrode of the sensor Figure 1A and above the bottom electrode of the sensor Figure 1B, respectively.

4.1.5 ω0 = (RsCs) -1 [s-1] – Characteristic frequency.

4.1.6 s = (ω0)-1 [s] – Relaxation time constant.

4.1.7  = RC [s] – Time constant, where C is the total capacitance of the analyzed network.

4.2 U [V] – Voltage of the step applied to the sensor.

4.3 ν and ω = 2π ν [s-1] – Frequency and circular frequency of the voltage applied to the sensor.

4.4 ε0 [Cb/V*cm]– Dielectric constantof vacuum.

4.5 ε– Relative dielectric constant of the sample material.

4.6 Q(t) [Cb] – Time-dependent charge on the sensorcapacitancesCa, Cs [pF] after application of the voltage step U [V].

4.7 ds [cm] – Sample thickness.

4.8 Ts [K] – Sample temperature.

4.9 Tn= 298 K (25 0C)– Temperature used for normalization of resistivity data.

4.10 D [cm] – Sensor diameter.

4.11 ∆E [eV]– Activation energyat T = 0 K.

5 Physical background

5.1 Conventionally the resistivity ρ is obtained using Ohms law:

V = I R(1)

The voltage V is applied to an electrically contacted specimen with known dimensions length L and cross section A and the resulting current I along L is measured to yield:

ρ = (VA) / (IL)(2)

5.2 The noncontacting capacitive methods used in this standard are based on the property that a network composed of a resistance Rs and a capacitance Cs exhibits a relaxation time constant:

s = RsCs(3)

or, equivalently, a characteristic circular frequency:

ω0 = 2π ν0 = (RsCs) -1(4)

5.3 Specifically, as described below, the relaxation time constant or characteristic frequency of a network composed of a resistance and two capacitances connected in series is measured.

5.4 Commercial systems for contactless evaluation of resistivity are either based on the evaluation of a time constant (Method TD, see Appendix 1) or a characteristic frequency (Method FD, see Appendix 2).

6 Sensors

6.1 The network to be analyzed is physically realized by the sample and sensor arrangement. Depending on practical considerations either a sensor containing a plate capacitor (Figure 1) or a ring capacitor (Figure2) is used.

Figure 1

Sensor Containing a Plate Capacitor

Figure 2

Sensor Containing a Ring Capacitor

6.2 The plate sensor (PS) comprises a top electrode with typically D = 0.1 cm diameter and an extended back electrode used to place the sample between these electrodes. An annular guard ring around the top electrode ensures that the electrical field generated by applying a voltage between the electrodes is vertical. The sensor is positioned such that a small air gap da (typically 50 µm) is obtained between the top electrode and the top surface of the sample. The cylindrical portion of the sample with diameter D underneath the top electrode is analyzed exclusively, because only the charge Q(t) below the top electrode is measured (see Appendix 1 for details).

6.3 The ring sensor (RS) consists of a circular bottom electrode, typically with a diameter
D = 0.6 -1 cm, surrounded by a holed counter-electrode, which is formed as an extended plate to deposit the sample. The bottom electrode, centered in the hole of the counter-electrode, defines an annular gap of width de. It is recessed with respect to the counter-electrode such that an air gap da between the bottom electrode and the bottom sample surface is generated. The circular portion of the sample subject to the electric field above the bottom electrode, with a diameter of about 1.5 D, is analyzed (see Appendix 2 for details).

6.4 The network generated by the arrangements described in ¶ 6.2 and ¶ 6.3, Figures 1 and 2, is shown in Figure 3. Here Rs is the resistance of the sample portion wherein the electric field stimulates the current discharging the dielectric sample capacitance Cs . Ca is the capacitance associated with the air gap. The network analysis by methods TD (Figure 3A) and FD (Figure 3B) is illustrated. A voltage step generator (SG), charge amplifier (CA), floating signal generator (FSG) and signal conditioning circuit (SCC) are required. For details, see Appendix 1 and 2.

Figure 3
Equivalent Circuit (network) of the PS and RS Sensors, Analyzed by Methods TD (A) and FD (B)

7 Sample properties

7.1 The sample requirements are different for the two sensors.

7.2 For analysis with the PS (Figure 1, 2 and ¶6.2) the sample must be a slab with a thickness ds between 0.02 and 0.5 cm (200-5000 µm). The sample thickness variation must not exceed 2% across the measurement area D. For automated topographic evaluation of the entire sample area the overall thickness variation must not exceed 100 µm.

7.2.1 The sample must be large enough to cover a circle with diameter 2D. Its maximum lateral size is limited by the dimensions of the tool, usually designed to accommodate wafers up to a specified maximum diameter.

7.2.2 The surface of the sample can be as-sawn, but preferably should be lapped or polished. Due to the vertical orientation of the electric field and the resulting vertical direction of the discharging current, spurious surface conductivity resulting from surface contamination is uncritical.

7.3 For use with the RS (Figure 2 and ¶ 6.3), the sample may have arbitrary shapebut must have one flat surface covering a circle with diameter 2D, to be placed on top of the RS. Surface contamination resulting in surface conductance may be critical.

8 Anisotropy of resistivity

8.1 Because the current in the sample is flowing in the directions of the electric field distribution generated by the sensors PS or RS (Figures 1 and 2), the resistivity is measured along these directions. This constraint is inconsequential for crystals with isotropic resistivity such as GaAs or InP. However, hexagonal crystals such as SiC exhibit significant resistivity anisotropy,whence resistivity in this case is described by a second order tensor.

8.2 The electric field direction of the PS (Figure 1) is vertical (perpendicular to the sample surface), whereas the RS (Figure 1B) generates a field with components both parallel and perpendicular to the sample surface. The measured resistivity values, therefore, differ according to the resistivity anisotropy of the material.

NOTE 1:For instance, in 6H SiC ρ [║ c] / ρ [┴ c] ≈ 4.8; in 4H SiC ρ [║ c] / ρ [┴ c] ≈ 0.8.

9 Recommended measurement procedures

9.1 Commercial tools using TD evaluation are presently available with PS and RS. The system using the PS is designed to generate full wafer resistivity topograms. FD evaluation is offered in combination with RS. Taking into account the respective resistivity measurement ranges (see Appendix 1 and 2) and eventual resistivity anisotropy (see § 8), FD evaluation is recommended for isotropic material with resistivity up to 1E9 Ω•cm (typically GaAs, InP and CdTe), whereas TD evaluation is generally applicable, including in particular high resistivity SiC. For anisotropic material the PS and platelets withtheir normal parallel to the c-axisare required to obtain ρ [║ c]

9.2 Detailed instructions how to initiate, execute and evaluate the computer-controlled measurement is provided by the commercial tools, such that operator action is confined to manually placing and removing the sample, inserting sample identification and measurement definition data, and to starting the automated measurement procedure. As mentioned, no sample preparation other than careful cleaning of the sample surface (in particular dust removal) is required.

10 Temperature measurement and resistivity normalization

10.1 The resistivity of semi-insulating semiconductors depends on temperature according to:

ρ (T) ~ exp (∆E/kT)(5)

Here ∆E is the activation energy at T = 0K needed to transfer electrons/holes occupying the partly ionized compensation level to the conduction/valence band. For comparison of measurements at different temperatures, normalization of the measured ρ(Ts) to a reference temperature Tn.= 298 K (25°C) is required.

10.2 For semi-insulating semiconductors the temperature dependence ρ (T) is usually very strong (e.g. decreasing the temperature of GaAs by 7°C increases ρ by 100%). The normalization of data taken at different temperatures critically depends on ∆E and on the accuracy of the temperature assessment. Therefore, the difference between the temperature of the sample support plate, measured by a built-in sensor, and the sample temperature Ts measured by a sensor touching the top surface of the sample, must be taken into account. The sample temperature Ts must be chosen within the interval (20-30) °C such that the absolute value of the difference δT = (Ts – Tn) does not exceed
5 K. The normalized resistivity is then given with satisfactory accuracy by:

ρ (Tn) = ρ (298 K) = ρ (Ts) exp (δT ∆E / 7.65)(6)

NOTE 2: The activation energy ∆E is determined by the compensation process taking place during crystal growth and post-growth annealing. For standard commercial materials such as n-type semi-insulating GaAs this process is well established and reliably yields ∆E = 0.75 eV. However, for materials under development, obtained from different suppliers or different crystal growth runs of the same supplier, ∆E may vary substantially, even within a batch of wafers cut from the same crystal. In this case, it is recommended to measure ∆E individually for the sample to be characterized. This requires the measurement of ρ(T) at different temperatures. Respective commercial instrumentation allowing measurement up to 400 °C is available. An approximate estimate is obtained by measuring ρ (T) at two laboratory temperatures T1, T2 close to Tn = 298 K, to obtain:

∆E = 7.65 ln (ρ (T1)/ρ (T2)) / (T2 – T1)(7)

11 Persistent photoconductivity

11.1 Some semi-insulating semiconductors, including in particular SiC and Cd(Zn)Te, may exhibit persistent photoconductivity (PPC). This phenomenon is caused by configurational modification of certain defects upon ionization, thereby generating an energy barrier against recombination. This processdrastically increases the lifetime of photo-generated carriers, strongly decreasing the resistivity of such material (eventually by orders of magnitude). Resistivity recovers in the dark with time constants ranging from seconds to days.

11.2 PPC must be removed prior to measurement by storage of the sample in the dark for a sufficient length of time and subsequent measurement without interim exposure to light. For PPC with a long time constant this procedure may be accelerated by heating the sample to about 200°C, followed by cooling and measuring in the dark.

12 Evaluation

12.1 The resistivity ρ is calculated according to Equation A1-7 (method TD, Appendix 1) and Equation 7 (method FD, Appendix 2). Relative dielectric constants εhave been determined by various researchers, as found in the literature. The following values are suggested:

Table 1 Suggested Dielectric Constants

13 Reporting results

13.1 Evaluation Report required elements

13.1.1 Sample material, thickness and size, sketch of sample indicating measurement location,

13.1.2 Instrument used, including method (TD or FD) and type of sensor used (PS or RS),

13.1.3 Dielectric constant used for evaluation, with reference if different from value suggested in this standard,

13.1.4 Measurement temperature,

13.1.5 PPC (if observed) and procedure (waiting, heating) applied to avoid falsification,

13.1.6 Resistivity at measurement temperature,

13.1.7 If activation energy is known or has been measured: activation energy, normalization temperature and normalized resistivity,

13.1.8 Operator, place, and date.

14 Related Documents

14.1 Küpfmüller,K. Einführung in die theoretische Elektrotechnik (Introduction to theoretical electrical engineering), 13th edition, Heidelberg, Springer-Verlag 1990 pp.166 ff and pp 174 ff.

14.2 Stibal R., Windscheif, J. and Jantz W., Contactless evaluation of semi-insulating GaAs wafer resistivity using time-dependent charge measurement. Semicond. Sci. Technol. 1991: 6, 995.

14.3 Mueller S., Stibal R. and Jantz W., Contactless Topographic Analysis of Locally Inhomogeneous Resistivity in SiC and Cd(Zn)Te. Materials Science Forum Vols. 600-603 pp 557-560.

APPENDIX 1

MEASUREMENT OF RESISTIVITY USING METHOD TD

NOTICE: The material in this Appendix is an official part of SEMI [doc 5795] and was approved by full letter ballot procedures on [A&R approval date].

A1-1 Measurement procedure

A1-1.1 A slab of semiconductor material with area A and thickness d has a vertical (perpendicular to A) resistance Rs =  d/A and a vertical capacitance Cs = 0 A/d. Hence

RsCs = 0(A1-1)

independent of sample geometries.

A1-1.2 The network shown in Figure A1-1 (for convenience reproduced below) is generatedby the sample together with the plate sensorPS or ring sensor RS as shown in Figure 1 and Figure 2, respectively. These sample/electrode arrangements generate sample capacitances Cs and air capacitances Ca connected in series, such that the total capacitance is

(A1-2)

Figure A1-1

Reproduction of Figure 3A, Equivalent Circuit (network) of the Capacitive Sensor, Analyzed by Method TD

A1-1.3 We describe the measurement procedure by assuming that both capacitances Cs and Ca in Figure 3A are discharged. At time t = 0 a voltage step U (typically 10V) is applied by the signal generator SG, charging the capacitances instantaneously with an initial charge:

(A1-3)

A1-1.4 For t > 0, the voltage across the charged Cs causes a carrier transport through the sample resistance Rs, gradually discharging Cs. With decreasing voltage across Cs and a corresponding voltage increase across Ca additional charge is transported to Ca from the external source SG because the applied voltage U is held constant and Ca > C. Eventually, Cs is completely discharged and the charge on Ca is:

(A1-4)

A1-1.5 While charge redistribution is in progress, the instantaneous, time dependent charge is described by:

(A1-5)

where

(A1-6)

A1-1.6 This charge transient Q(t), illustrated in Figure A1-2, is converted into a voltage transient with the charge amplifier CA, to be recorded by a digital voltmeter.

Figure A1-2

Time Dependence of the Total Charge of the Network Shown in Figure 3A.

A1-1.7 By inserting the above relations for Q(0), Q() and  into (6) yields:

(A1-7)

A1-1.8 It is seen that the desired  is completely determined by the material constant  and the measured quantities Q(0), Q() and .

A1-2 Measurement range

A1-2.1 The TD measurement range is limited on the low resistivity side by the finite rise time of the voltage step and the charge amplifier, resulting in an electronically generated transient on the order of about 10 ns which would falsify a comparably fast charge relaxation transient. Commercial instrumentation allows evaluation of resistivity down to 1E5 Ω•cm, which corresponds to arelaxation transient time constant of about 100 ns. This limit coincides with the generally accepted lower limit of resistivity of semi-insulating materials.

A1-2.2 The upper limit of the TD measurement range, i.e. the evaluation of very slow transients on the order of seconds, is determined by amplifier drift stability. Moreover, for a topographic evaluation requiring thousands of individual data points the total measurement time may become prohibitive. These pragmatic reasons have led commercial suppliers to adopt an upper limit of the TD evaluation approach of 1E12 Ω•cm

A1-2.3 In ¶ 7.2, the sample thickness ds has been limited to 5 mm, although a dependence of ρonds is not observed for ds up to 15 mm. Apart from practical considerations (common wafer and test sample dimensions) a thickness limit has been imposed because the corresponding decrease of Cs eventually impairs the measurement accuracy. Hence useful data may be generated with samples ds > 5mm, but must not be claimed to be obtained in accordance with this standard.