M.Tech I (First) Semester Examination 2012-13

Course Code:MCS102 Paper ID:0971203

Advanced Computer Architecture

Time: 3 Hours Max. Marks: 70 Max Marks: 75

Note: Attempt six questions in all. Q. No. 1 is compulsory.

1. Answer any five of the following (limit your answer to 50 words). (4x5=20)

a) What is loop unrolling? And what are its advantages?

b) Differentiate between static and dynamic branch predication approaches.

c) What is fine-grained multithreading and what are the advantages and disadvantages of fine-grained multithreading?

d) What a VLIW processor?

e) What is sequential consistency?

f) State the advantages of threading.

g) Differentiate between write-through cache and snoopy cache.

h) Compare SDRAM with DRAM.

2. Discuss about any two compiler techniques for exposing ILP in detail. (10)

3. Describe the basic structure of a centralized shared-memory multiprocessor in detail. (10)

4. Discuss about the steps to be followed in designing I/O system. (10)

5. Describe the optimization techniques used in compiler to reduce cache miss rate. (10)

6. What are the advantages and disadvantages of distributed-memory multiprocessors? Also describe the basic structure of a distributed memory multiprocessor in detail. (10)

7. A uniprocessor computer can operate in either scalar or vector mode. In vector mode, computations can be performed nine times faster than in scalar mode. A certain benchmark program took time T to run on this computer. Further, it was found that 25% of T was attributed to the vector mode. In the remaining time, the machine operated in the scalar mode.

a) Calculate the effective speedup under the above conditions as compared with the condition when the vector mode is not used at all. Also calculate α, the percentage of code that has been vectorized in the above program.

b) Suppose we double the speed ratio between the vector mode and the scalar mode by hardware improvements. Calculate the effective speedup that can be achieved.

c) Suppose the same speedup obtained in part (b) must be obtained by compiler improvements instead of hardware improvements. What would be the new vectorization ratio α that should be supported by the vectorizing compiler for the same benchmark program?

8. Write short notes on any two of the following: (5+5)

a) Inter connection networks and clusters

b) Multi threading

c) RAID