ANTI-COLLISION SYSTEM FOR RAILWAYS

PROJECT

ACKNOLEDGEMENT

First we would like to thank the omniscient, omnipotent, omnipresent God by virtue of whom we are able to complete this project.

We are grateful to Mrs. Anamika Bhatia, our head of department for her valuable guidance, support and co-operation extend by her. Then we would like to thank Colonel Rakesh Sharma sir and our project coordinator and co-coordinator for their kind cooperation, help and never ending support. We would also like to thank Mr. Sudakar chauhan sir without whom our project would not have been successful in all means.

We are also thankful to Mr. Kamal Ghanshala (Chairman, GEU Dehradun) for providing us labs and facilities which proved to be very useful for our project.

In the end, we convey our sincere thanks to all those people who directly or indirectly helped us.

Aman Pant

Amit Bharti

Kumar Govind

ABSTRACT

In the recent time,we have seen a lot of railway accidents and yet Indian Railways have not implemented any effective Anti-Collision System which can avoid such type of accidents.

So,we come up with a project “Anti-Collision System (Railways)” which can avoid such type of railway accidents.

In this project,we have used Microcontroller,LCD panel,Wireless TransReceiver Unit (Zigbee),MAX 232,different IC’s and power supply.

Microcontroller is the heart of our project,it acts as an interface among LCD,Motor,Max 232,Potentiometer,LED’s and Transreceiver (Zigbee).

CONTENTS

TABLE OF CONTENTS

1.Introduction

1.1 Introduction of project……….……………………………..….….9

2.Block Diagram……………..…………………………..……………10

2.2.1Transmitter…………..…………………………………..…..10

2.2.2Reciever…………………………………………………….. 11

3.Simulation Diagram……………………………………………….13

4.PCB Layout…………………………………..……………..………14

5.Components Description

5.1ATMEGA 8...... 16

5.2PIN DIAGRAM……………………………………………...19

5.3Block Diagram……………………………………………….20

5.4PIN Description………………………………………………21

6TRANSISTOR………………………………………………………….26

7TRANSRECIEVER…………………………………………………….27

8LED……………………………………………………………………..30

9CAPACITOR…………………………………………………………...31

10DIODE………………………………………………………………….34

11RESISTOR……………………………………………………………...37

12MOTOR...………………………………………………………………39

13LCD……………………………………………………………………..40

14MAX 232……………………………………………………………….41

15IC 7805………………………………………………………………….42

16WORKING……………………………………………………………..43

17Bibilography and refrence………………………………………………44

INTRODUCTION

The idea of antiocollision system for railways clicked to our mind,because we have seen a lot of railway accidents recently in the past,yet railways have not implemented any such system in their railway network.altough konkan railway have patented a anticollison system and that is expected to come in picture in 2014 still that is specifically meant for deccan railways and doesn’t cater the need of whole Indian railway network.

17 rail accidents was reported in 2010 in which 5 alone takes place in UP due to dense fog condition,out of which in 19 July 2010 –Sainthia train collisionoccurred inSainthia,West Bengal,India, when the Uttar Banga Express collided with the Vananchal Express. Casualties stand at 63 people deadand more than 165 people injured, with many still trapped in wreckage and 8 May 2010 –West Bengal, theGyaneshwari Express train collision, a suspectedNaxaliteterrorist attack kills at least 170 people, was the disastrous one.

To prevent such rail accidents and to provide safety to the millions of passengers who suffer daily from trains we come up with the idea of anticollision system for railways, it not only warns driver before condition of collision but also automatically stop the train to prevent such collision.

BLOCK DIAGRAM

TRANSMITTER

L C D

RECEIVER

COMPONENTS USED

S.No / Name Of Component / Value/Type / Quantity
1. / Microcontroller / ATMEL 8 / 2
2. / LCD / Hitachi HD44780 / 2
3. / Transistor / 2N2222A / 2
4. / Crystal Oscillator / 14.7456MHz / 2
5. / Driver/Receiver / MAX-232 / 2
6. / Transreceiver / ZigBee / 2
7. / Voltage Regulator / IC 7805 / 2
8. / Potentiometer / 100K / 2
9. / D.C Motor / 6-12V / 2
10. / Electrolytic Capacitor / 10µF,1000µF / 8,2
11. / Ceramic Capacitor / 33µF / 4
12. / LED / Red,Blue,Green / 2,2,2
13. / Diode / 1N4007 / 2
14. / Resistor / .330K,1K / 4,6
15. / Switch / Button,DPDT / 4,2
16. / Connector / Programmable / 1
17. / Wires

SIMULATION DIAGRAM

PCB LAYOUT(TOP VIEW)

PCB LAYOUT(BOTTOM VIEW)

  • COMPONENTS DESCRIPTION

ATMEGA 8

Features

High-performance, Low-power AVR®

-8-bit Microcontroller

Advanced RISC Architecture

– 130 Powerful Instructions – Most Single-clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 16 MIPS Throughput at 16 MHz

– On-chip 2-cycle Multiplier

High Endurance Non-volatile Memory segments

– 8K Bytes of In-System Self-programmable Flash program

memory

– 512 Bytes EEPROM

– 1K Byte Internal SRAM

– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM

– Data retention: 20 years at 85°C/100 years at 25°C(1)

– Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program

– True Read-While-Write Operation

– Programming Lock for Software Security

Peripheral Features

– Two 8-bit Timer/Counters with Separate Prescaler, one compare

Six Channels 10-bit Accuracy

– Byte-oriented Two-wire Serial Interface

– Programmable Serial USART

– Master/Slave SPI Serial Interface

– Programmable Watchdog Timer with Separate On-chip

•Oscillator

– On-chip Analog Comparator

Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated RC Oscillator

– External and Internal Interrupt Sources

– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save

I/O and Packages

– 23 Programmable I/O Lines

– 28-lead PDIP, 32-lead TQFP, and 32-pad QFN/MLF

Operating Voltages

– 2.7 - 5.5V (ATmega8L)

– 4.5 - 5.5V (ATmega8)

Power Consumption at 4 Mhz, 3V, 25°C

– Active: 3.6 mA

– Idle Mode: 1.0 mA

– Power-down Mode: 0.5 µA

Pin Configurations

The ATmega8 is a low-power CMOS 8-bit microcontroller based on the AVR RISC architecture.

By executing powerful instructions in a single clock cycle, the ATmega8 achieves throughputsapproaching 1 MIPS per MHz, allowing the system designer to optimize power consumption versus processing speed.

BLOCK DIAGRAM

Pin Descriptions

VCC :-Digital supply voltage.

GND:- Ground.

Port B(PC7..PB0) :- is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). ThePort B output buffers have symmetrical drive characteristics with both high sink and sourcecapability. As inputs, Port B pins that are externally pulled low will source current if the pull-upresistors are activated. The Port B pins are tri-stated when a reset condition becomes active,even if the clock is not running.

Port C (PC5..PC0):- Port C is an 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). ThePort C output buffers have symmetrical drive characteristics with both high sink and sourcecapability. As inputs, Port C pins that are externally pulled low will source current if the pull-upresistors are activated. The Port C pins are tri-stated when a reset condition becomes active,even if the clock is not running.

Port D (PD7..PD0):- Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). ThePort D output buffers have symmetrical drive characteristics with both high sink and sourcecapability. As inputs, Port D pins that are externally pulled low will source current if the pull-upresistors are activated. The Port D pins are tri-stated when a reset condition becomes active,even if the clock is not running.

RESET (Reset input):- A low level on this pin for longer than the minimum pulse length will generate areset, even if the clock is not running. TheShorter pulses are not guaranteed to generate a reset.

AVCC:- AVCC is the supply voltage pin for the A/D Converter, Port C (3..0), and ADC (7..6). It should beexternally connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to VCC through a low-pass filter.

AREF:- AREF is the analog reference pin for the A/D Converter.These pins are powered from the analog supply and serve as 10-bit ADC channels.

Basic Function:- The main function of the CPU coreis to ensure correct program execution. The CPU must therefore be able to access memories,

perform calculations, control peripherals, and handle interrupts.

Interfacing Of Data Bus With Different Units

In order to maximize performance and parallelism, the AVR uses a Harvard architecture withseparate memories and buses for program and data.

Instructions in the Program memory areexecuted with a single level pipelining. While one instruction is being executed, the next instruction is pre-fetched from the Program memory. This concept enables instructions to be executedin every clock cycle.

The Program memory is In-System Reprogrammable Flash memory.The fast-access Register File contains 32 x 8-bit general purpose working registers with a singleclock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typical ALU operation, two operands are output from the Register File, the operation is executed,and the result is stored back in the Register File in one clock cycle.

Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data Space addressing enabling efficient address calculations. One of the these address pointers can also be used as an address pointer for look up tables in Flash Program memory. Theseadded function registers are the 16-bit X, Y and Z-register.The ALU supports arithmetic and logic operations between registers or between a constant anda register. Single register operations can also be executed in the ALU.After an arithmetic operation, the Status Register is updated to reflect information about the result of the operation.The Program flow is provided by conditional and unconditional jump and call instructions, able todirectly address the whole address space. Most AVR instructions have a single 16-bit word format. Every Program memory address contains a 16- or 32-bit instruction.

Program Flash memory space is divided in two sections, the Boot program section and theApplication program section. Both sections have dedicated Lock Bits for write and read/writeprotection.The SPM instruction that writes into the Application Flash memory section mustreside in the Boot program section.During interrupts and subroutine calls, the return address Program Counter (PC) is stored on theStack. The Stack is effectively allocated in the general data SRAM, and consequently the Stacksize is only limited by the total SRAM size and the usage of the SRAM. All user programs mustinitialize the SP in the reset routine (before subroutines or interrupts are executed). The StackPointer SP is read/write accessible in the I/O space.The data SRAM can easily be accessedthrough the five different addressing modes supported in the AVR architecture.The memory spaces in the AVR architecture are all linear and regular memory maps.

A flexible interrupt module has its control registers in the I/O space with an additional globalinterrupt enable bit in the Status Register. All interrupts have a separate Interrupt Vector in theInterrupt Vector table. The interrupts have priority in accordance with their Interrupt Vector position. The lower the Interrupt Vector address, the higher the priority.The I/O memory space contains 64 addresses for CPU peripheral functions as Control Registers, SPI, and other I/O functions. The I/O Memory can be accessed directly, or as the DataSpace locations following those of the Register File, 0x20 - 0x5F.

TRANSISTOR

The transistor’s function is to amplify an electric current. Many different kinds of transistors are used in analog circuits, for different reasons. This is not the case of digital circuits. In a digital circuit, only two values matters, on and off. The amplification ability of transistor is not relevant in digital circuit. In many cases, a circuit is built with integrated circuits (ICs). Transistors are often used in digital circuits as buffer to protect ICs. For example, when powering an electromagnetic switch (called a ‘relay’), or when controlling a light emitting diode (In any case).

Two different symbol are used for the transistor.

PNP Type

NPN Type

The name (standard part number) of the transistor, as well as the type and the way it is used is shown below.

2SAXXXX PNP type high frequency

2SBXXXX PNP type low frequency

2SCXXXX NPN type high frequency

2SDXXXX NPN type low frequency

The direction of the current flow differs between the NPN and PNP type.

When the power supply is the side of positive (plus), the NPN type is easy to use.

TRANSRECEIVER

Here we are using zigbee transreceiver for wireles communication.ZigBeeis the specification of a low-cost, low-power wireless communications solution, meant to be integrated as the main building block of ubiquitous networks. It is maintained by theZigBee Alliance, which develops the specification and certifies its proper implementation.ZigBee builds upon thephysical layerandmedium access controldefined inIEEE standard 802.15.4 for low-rateWPAN's. The specification goes on to complete the standard by adding four main components: network layer, application layer,ZigBee device objects(ZDO's) and manufacturer-defined application objects which allow for customization and favor total integration.These are responsible for a number of tasks, which include keeping of device roles, management of requests to join a network, device discovery and security.Its network layer natively supports three types of topologies: bothstarandtreetypical networks and generic mesh networks. Every network must have one coordinator device, tasked with its creation, the control of its parameters and basic maintenance. Within star networks, the coordinator must be the central node.

The main functions of thenetwork layerare to enable the correct use of the MAC sublayer and provide a suitable interface for use by the next upper layer, namely the application layer.The routing protocol used by the Network layer isAODV. In order to find the destination device, it broadcasts out a route request to all of its neighbors. The neighbors then broadcast the request to their neighbors, etc until the destination is reached. Once the destination is reached, it sends its route reply via unicast transmission following the lowest cost path back to the source.

Once the source receives the reply, it will update its routing table for the destination address with the next hop in the path and the path cost.

The application layer is the highest-level layer defined by the specification, and is the effective interface of the ZigBee system to its end users. It comprises the majority of components added by the ZigBee specification: both ZDO and its management procedures, together with application objects defined by the manufacturer, are considered part of this layer.

Zigbee protocol stack

As one of its defining features, ZigBee provides facilities for carrying out secure communications, protecting establishment and transport of cryptographic keys, cyphering frames and controlling devices. It builds on the basic security framework defined in IEEE 802.15.4. This part of the architecture relies on the correct management of symmetric keys and the correct implementation of methods and security policies.

LIGHT EMITTING DIODE (LED)

Light emitting diode must be chosen according to how they will be used, because there are various kinds. The led are available in several colours. The most common colours are red and green, but there are even blue ones.

The device on the far right in the photograph combines a red LED and green LED in one package. The component lead in the middle is common to both LED’s as for the remaining two leads; one side is for green, the other for the red LED. When both are tuned ON simultaneously, it becomes orange.

When an LED is new out of package, the polarity of the device can be determined by looking at the leads. The longer leads are the anode sides, and the shortest one is the cathode side.The polarity of an LED can also be determined using a resistor meter or even a 1.5 V battery.

When using a test meter to determine polarity, set the meter to a low resistance measurement range. Connect the probe of the meter to the LED. If the polarity is correct, the LED will glow. If the LED does not glow, switch the meter probes to the opposite leads on the LED.

CAPACITORS

A capacitor can store charge and its capacity to store charge is called capacitance. Capacitors consists of two conducting plates, separated by an insulating material (known as dielectric). The two plates are joined with two leads. The dielectric could be air, mica , paper ceramic, polyester, polystyrene etc. The dielectric gives name to the capacitor. Like paper capacitor, mica capacitor etc.

Types of capacitors :

Capacitor can be broadly classified in two categories, i.e., Electrolytic capacitor and Non-Electrolytic capacitor as shown in the figure above.

Electrolytic Capacitor:

Electrolytic capacitors have an electrolyte as a dielectric. When such an electrolyte is charged, chemical changes take place in the electrolyte. If it’s one plate is charged positively, same plate must be charged positively in the future. We call such capacitor as polarized. Normally we see electrolytic capacitor as polarized capacitor and the leads are marked with positive or negative on the can. Non-electrolytic capacitors have dielectric material such as paper, mica or ceramic. Therefore, depending upon the dielectric, these capacitor are classified.

Mica Capacitor:

It is sandwich of several thin metal plates separated by thin sheet of mica. Alternate plates are connected together and leads attached for outside connections. The total assembly is encased in a plastic capsule or Bakelite case. Such capacitor have small capacitance value (50 to 500pf) and high working voltage (500V and above). The mica capacitors have excellent characteristics under stress of temperature variation and high voltage application. These capacitor are now replaced by ceramic capacitor.

Ceramic Capacitor:

Such capacitor have disc or hollow tabular shaped dielectric made of ceramic material such as titanium dioxide and barium titanic. Thin coating of silver compound is deposited on both sides of dielectric disc, which acts as capacitor plates. Leads are attached to each sides of the dielectric disc and whole unit is encapsulated in a moisture proof coating. Disc type capacitors have very high value up to 0.001uf. Their working voltage range from 3V to 60000V. These capacitor have very low leakage current. Breakdown voltage is very high.