Lab 2: Part A
NPN Common-Emitter Amplifier
Notes:
1) Lab2: Part A is a guide to build the CE amplifier you designed in HW0. Verify that it is providing the gain as required. You don’t have to include detailed analyses in your report for Part A. Please provide a table/summary showing calculated, simulated and experimented values of overall gain AV, RC, and RE of your amplifier.
2) You can use the following design specifications and circuit to build the CE amplifier.
Design the amplifier to achieve the overall small-signal gain ≥ AV = -50 V/V and IC = 1 mA. Use Vcc=15 V, RSIG = 50 Ω, RL = 1 MΩ, RB1 =80 kΩ, and RB2 = 20 kΩ. Although there will be variations from transistor to transistor, you may assume β=70 (found from datasheet of Fairchild 2N3904; see bottom of Labs page) in your calculations. Note that you don’t need a physical resistor for RL as it represents the probe.
Objectives
The purpose of the Part A is to build an NPN-based common emitter amplifier that amplifies a small AC signal. This circuit will be used in Part B to analyze the frequency response.
Fig. 1 NPN Common-Emitter amplifier circuit with load resistor=probe.
Fig. 1 shows an NPN Common-Emitter (Emitter is common between Base and Collector) amplifier circuit. Note that vSIG and RSIG represent the ac signal source and its internal resistance, respectively. For the calculation and simulation purposes, you will include RSIG; however, you will omit it in the actual circuit on the breadboard. Also, note that for simulation purposes we will use Fairchild 2N3904 (custom component see Lab1). You may need to adjust values of the other components as necessary in the actual circuit to meet the design specifications. Coupling capacitors Cc1 and CC2 block DC voltages. Ideally if we apply a small ac signal at the base and we should obtain ac signal at the collector with some amplification.
1 DC Analysis:
Sketch DC model of the circuit in your lab book. Be sure to replace the three capacitors by open circuit. You can also omit VSIG, RSIG, and RL.
What are the values of IB and IE? What is the value of VB?
Determine the value of RE that produces vBE, the base-emitter saturation voltage as found in Fairchild 2N3904 datasheet. What is VE?
Note that at this point we know neither VCE nor RC.
What is the value of RE that produces Ic=1mA and VBE as found in datasheet?
2 AC (small-signal) Analysis:
Sketch small-signal model of the circuit in your lab book. Replace the transistor with its small-signal model, capacitors with short circuits, and VCC with an AC ground. Assume VA is large, and ignore rO. What would happen to RE? Label the voltage at base of the transistor as vi (with reference to ground). Note that this is the small-signal voltage at the gate. What are the values of gm and rπ. What is the ratio vπ /vSIG?
What is the value of RC that produces a small-signal gain of at least AV= - 50 V/V?
3 Simulation:
Simulate your circuit with all the capacitors set to 1 μF. Note that these values may have to change in the experiment. Use the values of RE and RC as determined by the previous calculations.
First run Interactive or DC .op analysis and determine the bias points.
Then run transient simulation to verify gain. Use vSIG = 10 mVpk-pk at 1 kHz. There should be no DC voltage at the input.
What is the overall gain AV ? Does it match your calculations?
4 Experiment:
Assemble the circuit as calculated and simulated on the breadboard. You should not include RSIG because it represents the internal resistance of the function generator.Using the multimeter, measure the DC voltages of your circuit at the base (VB), emitter (VE), and collector (VC) of the transistor. Using the function generator, apply vSIG = 100 mVpk-pk at 1 kHz (make sure that the function generator is set to high-z mode). Adjust other components as necessary to meet the required specification (AVmin = -50 V/V).
What is the measured value of overall AV ?
Note that the biggest source of variations from your simulation results will be due to the variation in β. What is the maximum gain that you can achieve without distorting the output signal? Increase the input voltage amplitude until you start seeing distortion in the output voltage. Can you optimize the circuit so that the transistor provides the maximum gain without distortion at this value of input voltage?
Weber State University EE3110 Microelectronics I Suketu Naik