CPE 404: MODERN PROCESSOR ARCHITECTURE
CATALOG DATA
Instruction-, data-, and thread-level parallelism. Scalar and superscalar pipelines. Instruction and data flow techniques. Memory hierarchy. Input/Output subsystem. Advanced architectures.
COREQUISITES AND PREREQUISITES
Prerequisite: CpE 300 with a grade of C or better. Advanced Standing required.
RELEVANT TEXTBOOKS
· John L. Hennessy, David A. Patterson. Computer Architecture: A Quantitative Approach, 4th ed.
· J. Shen, M. Lipasti, Modern Processor Design: Fundamentals of Superscalar Processors, McGraw-Hill, 2nd ed.
Coordinator
Emma Regentova
Instructors:
Drs. Sarah Harris, Emma Regentova, Mei Yang
Course Topics
I. Instruction set architecture and processor performance. Parallelism of different granularity size (1 week)
a. Instruction Set Architecture: CISC, RISC and VLIW architectures.
b. Evaluation of processor performance and optimization pathways.
c. Parallel processing and parallel architectures: classification and representatives.
d. Instruction level parallelism (ILP), limitations of ILP.
II. Pipelined processors. (6 weeks)
a. Overview: instruction fetch, decoding, dispatching, execution, completion and retirement.
b. Pipeline idealism; balancing pipeline stages; unifying instruction types.
c. Program flow and control dependencies; scheduling; pipeline hazards, penalty cycles and data forwarding.
d. Complier techniques; why RISC.
e. Parallel, diversified and dynamic pipelines.
f. Instruction Flow Techniques; branch prediction; speculation.
g. Register Data Flow Techniques: register renaming, reservation station and reorder buffer, dynamic instruction scheduler.
h. Memory Data Flow Techniques: ordering of memory accesses, load bypassing and load forwarding, speculative loads.
i. Survey of Superscalar Processors and its limitations.
III. Multiprocessors and Multithreading (4 weeks).
a. Coarse-grain/fine-grain/simultaneous multithreading.
b. Latency hiding
c. Synchronizing shared-memory threads: atomic operations and hardware techniques.
d. Memory consistency and cache coherence; snooping and directory based cache coherence protocols.
IV. Input/Output subsystem (2 weeks)
Course Outcomes
Upon completion of this course, students should be able to:
1. Design a pipelined architecture. Perform simulation and evaluate the performance. Identify critical paths and optimize the design (a,b) [1,2]
2. Design branch prediction unit (c,e). [1,2]
3. Understand compiler tasks and optimization techniques, static/dynamic interface (a,b,c) [1,2]
4. Design, analyze and optimize caches of specified types (1.6, 1.7). [1,2]
5. Design and analyze memory subsystem and I/O (a,b,c) [1,2]
6. Analyze multiprocessor systems (a,b). [1,2]
7. Understand and analyze advanced architectures (a,b, j) [1,2]
8. Present results of analysis and simulation (b,j) [1,2,3]
ABET OUTCOMES
(a) an ability to apply knowledge of mathematics, science, and engineering
(b) an ability to design and conduct experiments, as well as to analyze and interpret data
(c) an ability to design a system, component, or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability, and sustainability
(d) an ability to function on multidisciplinary teams
(e) an ability to identify, formulate, and solve engineering problems
(f) an understanding of professional and ethical responsibility
(g) an ability to communicate effectively
(h) the broad education necessary to understand the impact of engineering solutions in a global, economic, environmental, and societal context
(i) a recognition of the need for, and an ability to engage in life-long learning
(j) a knowledge of contemporary issues
(k) an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.
Computer Usage
Students use DLS, Simple Scalar and other simulators to analyze the system or a component performance. Students use HDL and CAD tools and platforms to design a component or a system.
UULO Course Outcomes
1. Intellectual Breadth and Lifelong Learning
2. Inquiry and Critical Thinking
3. Communication
4. Global/Multicultural Knowledge and Awareness
5. Citizenship and Ethics
Gradin
Cumulative: Based on homework, projects and exams.
Course Syllabus Preparer and Date:
Dr. Mei Yang, 2/14/2018