LP: Rev. No: 00
Date:10:12:09
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Sub Code & Name: CS2253-Computer organization
and Architecture
Branch : CS Semester : B.E-IV
DOC/LP/00/08.12.09
UNIT-I BASIC STRUCTURE OF COMPUTERS 9
Syllabus – Functional Units-Basic Operational Units-Bus Structures-Performance and metrics and Instructions and Instruction Sequencing-Hardware-Software Interface-Instruction Set Architecture-Addressing modes-RISC-CISC-ALU Design-Fixed point and Floating point Operations.
Objectives:
To understand the Functions and design of various units of digital computers to store and process the informations.
Session no / Topics to be covered / Time in min. / Ref. / Teaching method1 / Functional Units, Basic Operational Units / 50 / T1 / BB
2 / Bus Structures, / 50 / T1 / BB
3 / Performance and metrics and Instructions and Instruction Sequencing / 50 / T1 / BB
4 / Hardware,Software Interface / 50 / R2 / BB
5 / Instruction Set Architecture, Addressing modes / 50 / T1 / BB
6 / RISC,CISC / 50 / R2,R3 / BB
7 / ALU Design / 50 / R2,R3 / BB
8 / Fixed point Operations / 50 / R2,R3 / BB
9 / Floating point Operations / 50 / R2,R3 / BB
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Sub Code & Name: CS2253-Computer organization
and Architecture
Branch : CS Semester : B.E-IV
UNIT II - BASIC PROCESSING UNIT 9
Syllabus: Fundamental concepts – Execution of a complete instruction – Multiple bus organization – Hardwired control – Micro programmed control – Nano programming.
Objectives:
To study the Fundamental concepts of various processing units.
Session no. / Topics to be Covered / Time in min. / Ref. / Teaching Method10. / Fundamental concepts / 50 / T1 / BB
11. / Execution of a complete instruction / 50 / T1 / BB
12. / Multiple bus organization / 50 / T1 / BB
13. / Introduction about control units / 50 / T1 / BB
14. / Hardwired control / 50 / T1 / BB
15. / Micro programmed control / 50 / T1 / BB
16. / Nano programming / 50 / R2 / BB
17. / Revision for CAT I / 50
18. / CAT - I
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Sub Code & Name: CS2253-Computer organization
and Architecture
Branch : CS Semester : B.E-IV
UNIT III - PIPELINING 9
Syllabus: Basic concepts – Data hazards – Instruction hazards – Influence on instruction sets – Data path and control considerations – Performance considerations – Exception handling.
Objectives:
To know and understand the various types of hazards and Exception handling concepts..
Session no. / Topics to be covered / Time in min. / Ref. / Teaching Method22. / Basic concepts / 25 / T1 / BB
23. / Data hazards / 50 / T1 / BB
24. / Instruction hazards / 50 / T1 / BB
25. / Influence on instruction sets / 25 / T1 / BB
26. / Data path / 50 / T1 / BB
27. / control considerations / 50 / T1 / BB
28. / Performance considerations / 50 / T1 / BB
29. / Exception handling. / 50 / R2 / BB
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Sub Code & Name: CS2253-Computer organization
and Architecture
Branch : CS Semester : B.E-IV
UNIT IV - MEMORY SYSTEM 9
Syllabus: Basic concepts – Semiconductor RAM – ROM – Speed – Size and cost – Cache memories – Improving cache performance – Virtual memory – Memory management requirements – Associative memories – Secondary storage devices.
Objectives:
To study and understand the concepts of various memory system.
Session no. / Topics to be covered / Time in min. / Ref. / Teaching method30. / Basic concepts / 50 / T1 / BB
31. / Semiconductor RAM / 50 / T1 / BB
32. / ROM, Speed , Size and cost / 50 / T1 / BB
33. / Cache memories / 50 / T1 / BB
34. / Improving cache performance / 50 / T1 / BB
35. / Virtual memory / 50 / T1 / BB
36. / Memory management requirements / 50 / T1 / PP
37. / Associative memories / 50 / R2 / BB
38. / Secondary storage devices / 50 / T1 / BB
39 / Revision for CAT II / 50
40 / CAT - II
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Sub Code & Name: CS2253-Computer organization
and Architecture
Branch : CS Semester : B.E-IV
UNIT V- I/O ORGANIZATION 9
Syllabus: Accessing I/O devices – Programmed Input/Output -Interrupts – Direct Memory Access – Buses – Interface circuits – Standard I/O Interfaces (PCI, SCSI, USB), I/O devices and processors.
Objectives:
To know the services and functions of the various Interfaces and Interrupts.
Session no. / Topics to be covered / Time in min. / Ref. / Teaching method41. / Accessing I/O devices / 50 / T1 / BB
42. / Programmed Input/Output / 50 / R2 / BB
43. / Interrupts / 50 / T1 / BB
44. / Direct Memory Access / 50 / T1 / BB
45. / Buses / 50 / T1 / BB
46. / Interface circuits / 50 / T1 / BB
47. / Standard I/O Interfaces (PCI, SCSI, USB) / 50 / T1 / BB
48. / I/O devices and processors. / 50 / R2 / BB
48. / Review for CAT III / 50
49. / CAT III / 90
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Sub Code & Name: CS2253-Computer organization
and Architecture
Branch : CS Semester : B.E-IV
Course Delivery Plan
Week / 1 / 2 / 3 / 4 / 5 / 6 / 7 / 8 / 9 / 10 / 11 / 12I II / I II / I II / I II / I II / I II / I II / I II / I II / I II / I II / I II
Units / 1 / 1 / 1 / 1 / 2 / 2 / 2 / 2 / 2 / 2 / 3 / 3 / 3 / 3 / 4 / 4 / 4 / 4 / 4 / 4 / 5 / 5 / 5 / 5
BOOKS FOR REFERENCE:
TEXT BOOKS
1. Carl Hamacher, Zvonko Vranesic and Safwat Zaky, “Computer Organization”, Fifth Edition, Tata McGraw Hill, 2002.
REFERENCE
1. David A. Patterson and John L. Hennessy, “Computer Organization and Design: The Hardware/Software interface”, Third Edition, Elsevier, 2005.
2. William Stallings, “Computer Organization and Architecture – Designing for Performance”, Sixth Edition, Pearson Education, 2003.
3. John P. Hayes, “Computer Architecture and Organization”, Third Edition, Tata McGraw Hill, 1998.
4. V.P. Heuring, H.F. Jordan, “Computer Systems Design and Architecture”, Second Edition, Pearson Education, 2004.
Prepared by / Approved bySignature
Name / Miss.P.Vinothiyalakshmi,
Miss.J.Buvana / Dr.Susan Elias
Designation / Lecturer / Hod,Dept. of CSE
Date / 10:12:2009 / 10:12:2009