Lab 04: Feedback Amplifier

Total 30 points: 20 points for lab, 5 points for well-organized report, 5 points for immaculate circuit on breadboard

NOTES:

1) In this lab, we will use quad op-amp LM348N to build the feedback amplifier. The feedback topology and concepts apply to any BJT-based and MOSFET-based multistage amps.

2) You must answer the boxed questions listed under L1…L6 to get full credit. Lab report must be well-organized. You will be graded on this aspect. Use the template from Labs page.

Objectives

The purpose of this lab is to,

(1) demonstrate the effect of negative feedback on amplifier performance and

(2) understand the method of frequency compensation.

The lab is divided into three parts. Part 1 involves the construction and characterization of an amplifier whose poles are accurately set by discrete resistors and capacitors. In Part 2, we will close the feedback loop and measure the effect on the amplifier. In Part 3, we will use dominant pole compensation to stabilize the system.

A major benefit of using a feedback amplifier is to make the gain independent of load, fabrication process, and environmental conditions such as temperature. Additionally, the feedback amplifier enhances bandwidth and is more effective at rejecting noise.

For the simulation and experiments, you can use the quad op-amp LM348N (datasheet at the bottom of labs page). Connect the positive and negative power supplies of the op-amps to 10 V and -10 V, respectively. In addition the components shown in Fig. 1, you will need more resistors to complete the feedback amplifier shown in Fig. 2 and a capacitor for compensation.

Fig. 1: An open-loop “multi-stage” amplifier made with three op-amps and discrete components

As discussed in the class, the high-frequency response (poles and zeros) of an amplifier is primarily due to the internal capacitors (e.g. between gate and drain, base and collector etc.). The high-frequency poles and zeros result from the internal capacitances of the transistors. These poles occur at frequencies too high to be measured using a breadboard (the poles of the breadboard wiring appear at lower frequencies than the amplifier poles). To avoid this problem,

we will deliberately and accurately set these poles to relatively low frequencies by external resistors and capacitors (using R3, R4, R6 and C1, C2,C3 in Fig. 1).

Fig.1 shows the open-loop schematic of the amplifier using three different op-amps[1]. Note that the first amp in the chain is the non-inverting op-amp, the second amp is the buffer, and the third amp is the inverting op-amp. This circuit models an op-amp on IC with multiple gain stages, where vin is the positive input, and the negative input is implicitly grounded. The above circuit has a high input resistance, low output resistance, and high gain. The capacitors C1, C2, and C3 limit the high-frequency response of this amplifier and emulate the role that internal transistor parasitic capacitances which are inherent in the actual IC. The resistors R3, R4, and R6 shape the high-frequency response as well as provide matching to the input/output resistances at the individual amplifier stages. Again, note that the entire circuit shown in Fig. 1 will emulate as a multi-stage amplifier. The circuit has an approximate overall gain of -220 V/V.

For the simulation and experiment, we will first build the circuit, verify gain at each stage. Next, we will do AC simulation on the open-loop circuit shown in Fig. 1. Next we will close the loop by adding the feedback network and do AC simulation. After that, we will compensate the amplifier to increase its stability.

1.0 Simulation

Before you do the simulation, make sure that Multisim parts library has Texas Instruments LM348N model (search for LM348N then select TI LM248 in the Model manufacturer/ID window). Now connect resistors and the positive and negative power supplies to the first op-amp (U1A in Fig. 1). Please make sure that you use sub-instances of a single opamp (e.g. U1A, U1B, U1C) in your schematic and not separate op-amp instances (e.g. U1A, U2A, U3B).

1.1 Transient Simulation

Run the transient simulation with appropriate resistor values on the first op-amp after setting the input amplitude to small value at 100 Hz and verify that the op-amp shows the gain around 11. Similarly, add more op-amps (U1B, U1C) and the circuit components as shown in the Fig. 1 and verify the gain at each step (for both the simulation and experiment, the input signal amplitude should be small enough such that the output does not saturate). Note that the gain will drop as the signal passes through the passive components R3-C1-R4-C2 and R5-C3. In order to bring the signal level up again, we will use the third op-amp with gain≈20 V/V. Make a note of the overall open-loop gain from the transient simulation |Vo|/|Vin|. Also note that the last stage is an inverting op-amp and will therefore invert the signal and provide the open-loop gain= -A(s).

L1: Run transient simulation and provide Vo and Vin plots of the circuit in Fig. 1.

1.2 Open-loop Frequency Response

(1) Run an AC simulation on the open-loop amplifier in Fig. 1 (make sure to set the AC amplitude=1, select Vout and vertical scale=dB) and plot the magnitude and phase response. The value of the gain at 100 Hz should be similar to what you obtained in the transient simulation (20*log10(x); where x=total gain in 1.1).

L2: Run AC sweep and provide the magnitude and phase response plots of the open-loop amplifier in Fig. 1. Verify that the gain is similar to the one found in 1.1 at 100 Hz.

(2) First find the frequency at which the phase crosses 0 deg2. This is the frequency at which the amplifier will become unstable depending on the feedback factor= β=Ra/(Ra+Rb), where Ra and Rb form the feedback as shown in Fig. 2. Using the bode plot of the open-loop amplifier, we can predict the stability of different values of Ra and Rb. Let’s say you are looking for a feedback factor that gives you the most stable response. For a feedback factor of β = 1/2.5 (i.e. Ra= 1 kΩ and Rb=1.5 kΩ in Fig. 2), determine whether closed-loop system will be stable or unstable. Stability of an amplifier can be determined by observing its Phase Margin (see section 10.12.3 p. 881-882). Record the Phase Margin as follows: check where the magnitude crosses 20 log(1/β) constant line. Note the value of the phase at that crossing. This is the phase margin[2]. If this value is negative (since our reference is 0 deg) then the closed-loop amplifier will be unstable. As a rule-of-thumb, Phase Margin (PM) of 60-70 deg allows stable operation with acceptable gain. For now, we will accept the positive PM.

(3) Repeat the previous step for a feedback factor of β = 1/16 (i.e. Ra= 1kΩ and Rb=15 kΩ in Fig. 2).

L3: What is the frequency at which phase=0°? What is the phase-margin of the amplifier at the feedback factor β = 1/2.5, β = 1/16?

Fig. 2: Closed-loop amplifier with the feedback network and the open-loop amplifier (-A(s)) shown in Fig. 1

1.2 Uncompensated Feedback Amp

We will now close the feedback loop. At this point, it is beneficial to run transient simulation to predict stability. You can create a symbol representing the schematic in Fig. 1 (place hierarchical connectors at the input and output-> select all-> right click->replace by hierarchical block) and use it for the closed-loop simulation. Or you can create a separate file for the closed-loop simulation. It is important to save the open-loop schematic separately because we will use it later for the compensation in section 2.3. Let’s select Ra = 1kΩ. We will adjust the value of Rb to give feedback values of β = 1/2.5 and β = 1/16 (recall that β=Ra/(Ra+Rb)).

(1) With the above values of β (i.e. appropriate Rb values), connect a 100 mVamp (or smaller), 100 Hz square wave at the input. Run the simulation for about 2 periods of the input wave. Do you see any ringing in the output signal? For the unstable β, the output will saturate. For stable β, the output should show an approximate gain ~ 1/ β as predicted by feedback theory. Note that as you increase Rb value, you make the amplifier stable (ringing reduces) but reduce the bandwidth of amplifier.

L4: Run transient simulation with 100 Hz input square wave and provide the Vin and Vout plots of the closed-loop amplifier at the feedback factor of β = 1/2.5 and 1/16.

1.3 Compensation

Now we will compensate the amplifier with a capacitor so that the ringing is diminished while ensuring that bandwidth does not reduce too much.

(1) Open up previously-saved open-loop amplifier schematic. We will run AC simulation and look at the magnitude and phase responses again. Adjust the value of C2 and run the AC simulation until the amplifier shows a PM ~ 70 deg at β = 1/16. Record the value of C2.

(2) Open up the closed-loop amplifier schematic with Rb = 15 kΩ (β = 1/16). Use the new value of C2. Run the transient simulation with 100 mVamp (or smaller), 100 Hz square wave again. Do you see any ringing in the output signal? Note that the ringing should either eliminated or reduced. Otherwise adjust C2 value.

L5: Using the new value of compensation capacitor, provide the magnitude and phase plots of the open-loop amplifier showing PM~70 deg and the transient plot with square wave for the closed-loop amplifier with β = 1/16.

Note that the IC design of a multi-stage amplifier involves compensation to stabilize the circuit and to ensure that the circuit will work as expected post-fabrication.

2.0 Experiment

Use the shortest possible wires (ask for short jumper wires if you don’t have any) and clip the terminal wires of your components and make them as short as possible. Make your circuit very neat and organized. Please ask to see an example. You will be graded on this aspect of the experiment.

Don’t forget to check the multi-meter mode before you measure a current or voltage, if it is set incorrectly you will blow a fuse!

HIGH-Z MODE Make sure you put the function generator in High-Z mode. Otherwise

your signal amplitudes will be off by factor two.

Check the operation of the circuit in steps. First build the first stage. Use 10 mVamp sine wave at 100 Hz and verify that the gain≈11 V/V. Next, build the buffer stage (second stage) and verify that the gain is 1 V/V and the overall gain drops below 11 V/V (due to the external resistors R3, R4 and capacitors C1 , C2). Now add the third stage and verify that the gain goes up as determined by R7/R6 (note that the gain of the last stage won’t be exactly -20V/V.) Lower the input amplitude such that the output signal looks sinusoidal and that there are no distortions present.

2.1 Open-loop Frequency Response

Open-loop frequency sweep: perform a sinusoidal frequency sweep but you don’t have to record values for magnitude and phase. Note the upper 3-dB cutoff frequency (observe the frequency at which the output signal amplitude drops to 0.707 x the amplitude at 100 Hz).

2.2 Uncompensated Feedback Amp

(1) Now, connect a 100 mVamp (or smaller), 100 Hz square wave to the closed-loop circuit with Rb= 15 kΩ and Ra= 1 kΩ and observe that either output signal shows ringing or it is clipped to the rail-to-rail voltage. If it is not clipped at power supply values, it should show Af ~ 1/β.

(2) Perform a sinusoidal frequency sweep and observe the upper 3-dB cutoff frequency. Compare it with the open-loop amp cut-off frequency.

2.3 Compensated Feedback Amp

(1) Use the same circuit as above, i.e. closed-loop circuit with Rb= 15 kΩ and Ra= 1 kΩ. Use the value of the compensation capacitor as determined in the simulation. Observe that ringing reduces (perhaps diminishes with an appropriate capacitor) with square wave input.

(2) Perform a sinusoidal frequency sweep and observe the upper 3-dB cutoff frequency. Compare it with the uncompensated amp cut-off frequency.

L6: Report the upper 3-dB (cut-off) frequencies of the open-loop amplifier, the uncompensated feedback amplifier, and the compensated feedback amplifier. Explain why the cut-off frequency changes. Also comment on the ringing when the square wave is connected to the uncompensated and compensated amplifiers.

Weber State University EE3120 Microelectronics II Suketu Naik

[1] Ref: Dr. Charles Cameron, U.of. U., ECE 3110: Engineering Electronics II, Fall 2008.

[2] Normally, when visualizing phase margin, we look at the difference=PM=180 deg-|phase at the cross point| with -180 deg as the reference but here we use 0 deg as the reference because we have the third stage that inverts the output of the second stage.