VHDL 200X Workshop

VHDL 200X Workshop

Call for Participation

September 4th, 2000
Department of Computer Engineering
University of Tübingen, Germany

Co-located with FDL 2000

The success story of VHDL is associated with the efforts of the VHDL Analysis and Standardization Group (VASG) of the IEEE Design Automation Standards Committee (DASC) to constantly improve the language with each new version of the standard. Due to their complexity and size, the next generation system-on-chip designs require new language capabilities that enhance and ease the design process at each level of abstraction.

To meet this challenge, standardization activities towards a major VHDL language revision have been started under the working title "VHDL 200X". A discussion on future requirements and new language features is currently taking place and, as a working group for VHDL-related activities in Europe, the Special Interest Group in Design Languages (SIG-DL) is organizing a VHDL 200X workshop just before the Forum on Design Languages (FDL 2000). Note that other VHDL-related topics will also be presented later during FDL.

The workshop will highlight the latest status of the standardization activities and will inform about the current outstanding language issues through a number of presentations. The workshop is not only a possibility to get the latest information about existing requirements for VHDL 200X but also to participate in the discussion on new requirements. Topics that are of interest include, but are not limited to, all current activities to enhance VHDL
such as the ones addressing the definition of a programming language interface (PLI), system-level support
and object-oriented features.

The workshop is also a forum to discuss the developments around VHDL and related standards. One major aim of the workshop is to identify the needs of the user community and to collect these needs in a requirements list for the standardization process. The idea of the workshop is to immediately enter into a discussion on the requirements and proposals that are presented on the workshop.

The workshop is open. Any presentation that deals with new requirements or comments on the VHDL language (language definition, usage, etc.) is welcome. To better organize the event, presentation proposals should be forwarded to the workshop Chair by August 18. Slide handouts will be provided to the workshop participants. Also, registering to the workshop by August 18 is welcome. The content of the workshop will be available and timely updated on the ECSI web site.