Integrated Circuit (IC) Package Materials Engineer

NXP Semiconductors is the global leader in embedded processing solutions, supporting the automotive, consumer, industrial, radio frequency and networking markets. From microprocessors and microcontrollers to sensors, analog ICs and connectivity — our vital technologies are the foundation to innovations that make our world greener, safer, healthier and more connected. NXP is committed to attracting great people of all styles, thoughts, cultures and backgrounds. NXP’s driven by a culture of ownership, leadership, teamwork, innovation and results — an engagement worldwide of more than 25,000 employees.

Global Technology Innovation (GTI)’s mission is to contribute to NXP’s sustainable competitive advantage by driving innovation. GTI focuses ondie-packagedesign technology and advanced circuits leveraging innovation to accelerate time-to-market and enable high performance and quality products at a competitive cost.GTI designs the semiconductor packages for NXP's broad product portfolio, sources, develops and integrates new packages and assembly processes in support of new-product introduction, new-technology and product roadmaps.

NXP’sGTI includes Packaging Innovation (PI)responsible for the implementation of packaging solutions for new product introduction and new technology development for packaging technologies for the varied business product lines; Automotive (analog, sensors and microcontrollers), Security & Connectivity and Digital Networking. PI has a Materials and Labs (M&L) team under Package Technology Core (PTC) that sources, analyzes, co-develop and integrates new materials into the die package system to achieve the product manufacturability, quality and reliability. The position will be in Austin, Texas.

The IC Package Materials Engineer worksin the PI Materials group with a leadership focus to drive packaging materials for various NXP business units, through in-depth material characterization / testing of fundamental thermo-mechanical, moisture, kinetic, structural, electrical and interfacial behavior under reliability conditions for package product applications. The engineer providesdirection and performs analytical testing to characterize package materials and the interfacial behavior of similar, and dissimilar, materials. The engineer works with the Mechanical, Thermal and Electrical Modeling engineering team to develop materials-based constitutive relations to provide enhanced predictive behavior of electronic packages. Specifically, the engineer leads packaging material investigations, sourcing, co-development, characterization and reliability for joining materials, adhesives and die attach adhesives (conductive adhesives, Pb-free solder, Ag sintering pastes, die attach films, etc.), solder alloys, gels, underfills and thermoset epoxy mold compounds.

The IC Package Materials Engineer worksclosely with other Packaging Engineers in New Technology Integration, Process Assembly, Modeling and Simulations, Silicon Fab Process Engineers to define manufacturable and reliable packaged products. This role includes working with the Quality organization to resolve immediate customer quality issues and the external customers supporting package performance. The engineer drives advanced package material selection through standard and innovative solutions to meet NXP’s total product package performance requirements across the product applications. The engineer will also be responsible for managing a material characterization lab and working closely with technicians to delegate material testing requirements, maintain testing log, analyze data and publish testing reports.

The requirements for this role are:

  • Ph.D. in Materials Scienceor Mechanical Engineering.
  • Working knowledge of various IC packages like QFP, QFN, BGA, flip chip, wafer level fan-in and fan-out.
  • Working knowledge of various IC package materials (e.g., adhesives, gels, and thermoset/thermoplastic encapsulants, solders, underfills etc.) and IC package assembly processes (i.e., wafer saw, die attach, wire bond, molding etc.)
  • Hands-on experience with material characterization tools (e.g., TMA, DMA, DSC, TGA, rheometer, nanoindenter and mechanical testing (3-point bend, tensile, shear, compression)) to characterize packaging materials.
  • Familiarity with material science concepts, structure-property relationships, fracture mechanics as it applies to semiconductor packaging and reliability is highly desired.
  • Knowledge of semiconductor device physics, reliability and associated failure modes and mechanisms is a plus.
  • Knowledge of Statistical Analysis and Design of Experiment is a plus.
  • Knowledge of electronic package Standards (e.g., JEDEC, IPC and AEC)is a plus.
  • Leadership, assertiveness,ability to be a team player with positive attitude,self-driven, go-getter, excellent communication and presentation skills (both written and verbal) are required.
  • Ability to work in a dynamic fast-paced environment, flexible and capable of adapting to changes while collaborating with teams at engineering and management levels, both globally and locally.

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