Department of Computer Engineering

Department of Computer Engineering

Faculty of Computer and Information Technology

Jordan University of Science and Technology

Preliminary Syllabus: CPE 453, Second Semester 2006 2007Digital Integrated Circuits (VLSI I)

Instructor: / Assistant Prof. Abdoul Rjoub
Email /
Teaching Assistant / Shadi Al-khateeb
Office & Tel: / E2 L3, 22516
Email: /
Home URL: / http://www.cie.just.edu.jo/abdoul/
Course URL: / http://www.cie.just.edu.jo/abdoul/VLSI I
Course Text: / Principles of CMOS VLSI Design, Second Edition, Addison-Wesley, 1992, Authors: Neil H. E. West and Karman Eshraghian.
Prerequisites / Electronics
Reference / 1. J.M. Rabaey, “Digital Integrated Circuit: A design perspective”, New York: Prentice
Hall, 1996.
2. S.M. Kang and Y. Leblebici, “CMOS Digital Integrated Circuits”, 2nd Edition,
McGraw Hill, 1999.
3. K. Martin, “Digital Integrated Circuit Design”, Oxford University Press, 1999.
4. Geiger, Randall L, Phillop E. Allen and Noel R. Strader, “VLSI Design Techniques
for Analog and Digital Circuits”, McGraw Hill, 1990.
5. Online textbook: http://www.edacafe.com/books/ASIC/ASICs.php
Office Hours / Sunday, Tuesday: 11:15 ~ 13:15. Monday: 10:15 ~ 12:15.
Other times by appointment.

Course Description

The course will cover basic theory and techniques of digital VLSI design in CMOS technology. Topics include: CMOS devices and circuits, fabrication processes, static and dynamic logic structures, chip layout, simulation and testing, low power techniques, design tools and methodologies, VLSI architecture. We use full-custom techniques to design basic cells and regular structures such as data-path and memory. CAD tools will be used in this course, basically Microwind 3.

Grading: Semester grades will be computed as:

·  Laboratories: 20%

o  Post Labs 10/20,

o  Midterm, Quizzes & Contribution 05/20,

o  Final Project 05/20,

·  First Exam 20%

·  Second 20%

·  Final Exam 40%

Total 100%

Aims:

This course is designed to teach students the basics of analysis and design of digital integrated circuits particularly in CMOS technology. The skills learned in this course will prepare students to do real-world design tasks in the field of digital IC design.

Objective:

The objective of this course is to introduce to the student the CMOS digital integrated circuit layout and design. This course covers CMOS integrated circuit design, layout and verification using the Microwind CAD tools. Topics covered are digital models, inverters, static logic gates, transmission-gates, flip-flops, and dynamic logic gates. It will cover also the main parameters of the digital integrated circuits designs such as: Speed, Power, and area.

Outcomes:

The Registered student in this course should understand the theory and operation of semiconductor circuits:

• Describe fundamental metrics used for quantitative evaluation of a digital circuit
• Explain basics of MOS transistors and CMOS technology
• Describe silicon technology scaling and trends
• Design using different logic styles such as complementary CMOS logic, pass-transistor logic, dynamic logic, etc
• Have the skill of transistor-level analysis and design of simple and complex logic gates such as inverter, NOR and NAND gates
• Explain different memory elements and design sequential logic circuits such as latches and flip-flops
• To measure and verify the performance of digital circuits in the laboratory
• To perform the SPICE simulation of simple digital circuits

Labs : The lab will be held weekly, the first 1st week will be an introduction to the CAD tool and the tutorial, next 5 weeks student will design simple logic gates and measure the basic parameters such as area, speed, power. From the 6th week on, the lab time will be used for the design project.

Course Content:

An approximation overview of the lecture coverage, in "lecture weeks," is given in the bellow table.

Event / Topics / Reading
Lecture 1 / Introduction, Objectives, and Expectations, / Chapter 1.
Lecture 2 / Design Tools and Flows,
Lecture 3 / VLSI Design: History: the past, current and future
Lecture 4 / CMOS Process and layout
Lecture 5 / CMOS Devices: SPICE and deep sub-micron issues
Lecture 6 / CMOS Inverter, Logic Operation and Design / Chapter 2.
Lecture 7 / Static CMOS Logic Gates
Lecture 8 / Static CMOS logic Gates – Examples
Lecture 9 / Multiplexer design and Demo
Lecture 10 / D FF and Latches.
Lecture 11 / Master Slave D FFs.
Lecture 12 / Review and quizzes
Exam 1 / Covering Lectures 1 through 11
Lecture 13 / Fabrication Process - Part I / Chapter 3.
Lecture 14 / Fabrication Process - Part II
Lecture 15 / Fabrication Process - Part III
Lecture 16 / Circuit Characterization and Performance Estimation, Introduction / Chapter 4.
Lecture 17 / Delay Time (Rise/Fall)
Lecture 18 / Delay Time over long line interconnections
Lecture 19 / Power Dissipation: Dynamic
Lecture 20 / Power Dissipation: Static
Lecture 21 / Power Dissipation: Leakage.
Lecture 22 / Examples and Quizzes.
Lecture 23 / Exam Review
Exam 2 / Covering Lectures 13 through 21
Lecture24 / Introduction: / Chapter 5.
Euler Path and Layout Design
Lecture25 / Design of Logic Gates.
Rise/Fall Time Overview.
Lecture26 / Rise/Fall time in CMOS inverter.
Rise/Fall time over CMOS Logic Gates
Lecture27 / Delay Time overview
Dynamic Logic Gates
Lecture28 / Example Dynamic Logic Gates
Static Logic Gates
Examples / Static Logic Gates
Lecture29 / Domino Logic Gates
Examples / Domino Logic Gates
Dynamic Logic Gates
Examples / Dynamic Logic Gates
Lecture30 / CPL Logic Gates
CPL Logic Gates / Examples
Overview

Good luck