Q1. The 10 mW-hr/cm3 energy goal is only about 1/30 the energy requirement

of DARPA's Dust mote program. This seems unusual. Why the difference?

A1. The 10mW-hr/cm3 specification works out to about 4W-hr/kg (for a silicon-based source). As you see from the battery comparison in the accompanying table (based on a literature search we performed at the onset of the project last year), our number falls comfortably into state-of-the art and/or development projects on-going worldwide (see table). DARPA projects are noted for their ambitiousness.

Some of the systems in this table appear to meet our current goal – from a power sourcing capability. However, these sources come packaged, and removing their packages destroys their function. We are producing capacitors/batteries for direct integration into our product. Also, our product form factors may change over the life of our program. Our goal is not to make power source records here. Our goal is to meet the system power requirements with materials that can be incorporated into3-D integrateddesigns.

Q2. A 130x capacitance improvement was mentioned but no capacitance number was quoted except that the goal was 1 F in an area 1 cm2, 0.1 cm thick (10 F/cm3). We need more specifics such as the calculated interfacial area from the corrugated design, a cyclic voltammetry plot, and a Ragone plot.

A2. The total capacitance measured in a flat (uncorrugated) section of wafer was 0.03F/cm2. Capacitance in the corrugated regions ranged from 2.3 – 4.4 F. For a 70nm nitride (assuming a 6.8 dielectric constant) this corresponds to an area enhancement factor (EF) ranging from 70 to 130. For a square aperture with negligible “strut” length, the area enhancement factor is 4d/W, where W is the aperture width and d is the aperture depth. We were originally targeting for a 50m depth. The final aperture width did not seem to correspond to the mask width. As we did not want to “cleave the wafer” we are relying on our test-piece estimates for etch depth.

On average, the aperture widths were about 4 m – this would lead to a calculated enhancement factor of 50. In some cases, our EF was almost 3x this value. But looking at the micrographs of the structures, we see considerable “edge rag” and other potentially area enhancing effects. What we apparently have is (in the jargon of solar-cell technology) a “violet cell” – an etch roughened surface. The area enhancement is large but not easily calculated theoretically. In any event, we are certainly within an order of magnitude of our estimates. Also, we are clearly able to achieve an area enhancement factor of 100.

Thinning the wafers to an easily achieved 4 mils (100m) would create capacitances equal to .23 - .44 mF/cm3. This is considerably off from our target. But it is 100x better than a flat capacitor. That is why we are trying multiple approaches – hiK dielectrics and electrochemical cells to assure our target is reached. Even for the nitride cell, some further improvements are possible. For example, the design goal was set to create a capacitor that would store a Joule of energy at 2 volts. The 70nm thick nitride we used could easily be charged to higher voltages (the breakdown field of silicon nitride is 15MV/cm). Charging voltages could be increased by an order of magnitude without breakdown occurring.

Cyclic voltammetry (CV) is a technique used to analyze ionic interactions at electrode/electrolyte interfaces. It is also a useful battery characterization tools, as it indicates the degree to which the cell can be viewed as a constant voltage current source. This is indicated by an apparently “flat” CV plot. Hydrated ruthenium oxide super-capacitors have demonstrated such flat CV plots. Similarly, a W-hr/kg vs W/kg plot (a Ragone plot - RP) is a useful characterizing tool for an electrochemical cell. We will be using RP and CV techniques for analyzing our electrochemical cells. The nitride capacitors studied in greatest detail are simple capacitors and follow standard RC discharge trajectories. CV and RP methods would not be useful here.